Metal interconnect structure and method for fabricating the same
A method for fabricating semiconductor device includes the steps of: forming a dielectric layer on a substrate; forming a trench in the dielectric layer; forming a first liner in the trench, wherein the first liner comprises Co—Ru alloy; forming a metal layer on the first liner; and planarizing the metal layer and the first liner to form a metal interconnection.
1. A method for fabricating semiconductor device, comprising:
forming a dielectric layer on a substrate;
forming a trench in the dielectric layer;
forming a second liner in the trench;
forming a third liner on the second liner;
performing an anneal process to transform the second liner and the third liner into a first liner in the trench, wherein the first liner comprises Co—Ru alloy;
forming a metal layer on the first liner, wherein the Co—Ru alloy contacts the metal layer directly; and
planarizing the metal layer and the first liner to form a metal interconnection.
2. The method of claim 1 , further comprising forming a barrier layer in the trench before forming the first liner.
3. The method of claim 2 , wherein the barrier layer comprises titanium nitride (TiN).
4. The method of claim 1 , further comprising performing the anneal process to form the first liner on the second liner.
5. The method of claim 1 , further comprising performing the anneal process to form the first liner between the second liner and the third liner.
6. The method of claim 1 , further comprising performing the anneal process after forming the metal layer.
7. The method of claim 1 , wherein the second liner and the third liner comprise different thicknesses.
8. The method of claim 1 , wherein the second liner and the third liner comprise same thickness.
9. The method of claim 1 , wherein the second liner and the third liner are selected from the group consisting of cobalt (Co) and ruthenium (Ru).
10. The method of claim 1 , wherein the metal layer comprises copper (Cu).