IP Library › Granted Patent US 11,323,033
Granted Patent B2
US 11,323,033 · App. 17/201,712 · Granted May 3, 2022

Digital current mode control for multi-phase voltage regulator circuits

Inventors: Sanjay Pant (Santa Clara, CA); Fabio Gozzini (San Jose, CA); Hubert Attah (Santa Clara, CA); Jonathan F. Bolus (San Francisco, CA); Wenxun Huang (Redwood City, CA)
Assignee: Apple Inc.
H02M3/1584G06F1/3203H02M3/157H03M1/12H02M3/1586
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Quick Facts
Patent No.
US 11,323,033
App. No.
17/201,712
Granted
May 3, 2022
Kind
B2
Abstract

A voltage regulator circuit included in a computer system may include multiple phase circuits each coupled to a regulated power supply node via a corresponding inductor. The phase circuits may modify a voltage level of the regulated power supply node using respective control signals generated by a digital control circuit that processes multiple data bits. An analog-to-digital converter circuit may compare the voltage level of the regulated power supply node to multiple reference voltage levels and sample the resultant comparisons to generate the multiple data bits.

Claims (50)

1. An apparatus, comprising:

a functional circuit block coupled to a regulated power supply node; and

a power converter circuit including a plurality of phase circuits coupled to the regulated power supply node via corresponding ones of a plurality of inductors, wherein the power converter circuit is configured to:

compare a voltage level of the regulated power supply node to a plurality of reference voltage levels to generate a plurality of bits;

generate a plurality of data words using the plurality of bits;

generating a plurality of control signals using the plurality of data words; and

activate a particular one of the plurality of phase circuits using a corresponding one of the plurality of control signals.

2. The apparatus of claim 1 , wherein the power converter circuit is further configured to divide a primary voltage reference to generate the plurality of reference voltage levels.

3. The apparatus of claim 1 , wherein to compare the voltage level of the regulated power supply node to the plurality of reference voltage levels, the power converter circuit is configured to compare the voltage level of the regulated power supply node to a particular one of the plurality of reference voltage levels to generate a corresponding one of the plurality of bits.

4. The apparatus of claim 1 , wherein the power converter circuit is further configured to compare the voltage level of the regulated power supply node to a threshold value.

5. The apparatus of claim 4 , wherein the power converter circuit is further configured to generate at least one pulse signal in response to a determination that the voltage level of the regulated power supply node is less than the threshold value.

6. The apparatus of claim 5 , wherein the particular one of the plurality of phase circuits is further configured to source a current to functional circuit, in response to receiving the at least one pulse signal while activated.

7. A method, comprising:

generating, by a power converter circuit, a particular voltage level on a regulated power supply node coupled to a plurality of circuit blocks;

performing, by the power converter circuit, a comparison of a voltage level of the regulated power supply node to a threshold value;

generating, by the power converter circuit, a first pulse signal based on results of the comparison; and

sourcing, by a particular phase circuit of a plurality of phase circuits included in the power converter circuit, a current to the regulated power supply node via a corresponding one of a plurality of inductors in response to receiving the first pulse signal.

8. The method of claim 7 , further comprising, generating, by the power converter circuit, a second pulse signal for the particular phase circuit in response to determining that a different phase circuit of the plurality of phase circuits is initializing.

9. The method of claim 7 , further comprising generating the first pulse signal in response to determining the voltage level of the regulated power supply node is less than the threshold value.

10. The method of claim 7 , further comprising:

generating, by the power converter circuit, a plurality of bits based on a comparison of the voltage level of the regulated power supply node to a plurality of reference voltage levels;

generating, by the power converter circuit, a plurality of data words using the plurality of bits; and

generating a plurality of control signals using the plurality of data words.

11. The method of claim 10 , further comprising:

generating, by the power converter circuit, the plurality of reference voltage levels using a primary reference voltage; and

comparing, by the power converter circuit, the voltage level of the regulated power supply node to a particular one of the plurality of reference voltage levels to generate a corresponding one of the plurality of bits.

12. The method of claim 10 , further comprising generating a particular control signal of the plurality of control signals using a corresponding one of the plurality of data words.

13. The method of claim 7 , further comprising:

retrieving, by the power converter circuit, information from a lookup table using data indicative of a voltage level of the regulated power supply node; and

generating, by the power converter circuit, the first pulse signal using the information retrieved from the lookup table.

14. An apparatus, comprising:

a plurality of circuit blocks coupled to a regulated power supply node;

a power converter circuit including a plurality of phase circuits, wherein the power converter circuit is configured to:

generate a particular voltage level on a regulated power supply node;

perform a comparison of a voltage level of the regulated power supply node to a threshold value; and

generate a first pulse signal based on results of the comparison; and

wherein a particular phase circuit of a plurality of phase circuit is configured to source a current to the regulated power supply node via a corresponding one of a plurality of inductors in response to receiving the first pulse signal.

15. The apparatus of claim 14 , wherein the power converter circuit is further configured to generate a second pulse signal for the particular phase circuit in response to determining that a different phase circuit of the plurality of phase circuits is initializing.

16. The apparatus of claim 14 , wherein the power converter circuit is further configured to generate the first pulse signal in response to a determination that the voltage level of the regulated power supply node is less than the threshold value.

17. The apparatus of claim 14 , wherein the power converter circuit is further configured to:

generate a plurality of bits based on a comparison of the voltage level of the regulated power supply node to a plurality of reference voltage levels;

generate a plurality of data words using the plurality of bits; and

generate a plurality of control signals using the plurality of data words.

18. The apparatus of claim 17 , wherein the power converter circuit is further configured to:

generate the plurality of reference voltage levels using a primary reference voltage; and

compare the voltage level of the regulated power supply node to a particular one of the plurality of reference voltage levels to generate a corresponding one of the plurality of bits.

19. The apparatus of claim 17 , wherein the power converter circuit is further configured to generate a particular control signal of the plurality of control signals using a corresponding one of the plurality of data words.

20. The apparatus of claim 14 , wherein the power converter circuit further includes a lookup table, and wherein the power converter circuit is further configured to:

retrieve information from the lookup table using data indicative of a voltage level of the regulated power supply node; and

generate the first pulse signal using the information retrieved from the lookup table.

Continuity (3)
Continuation 16877260 · May 18, 2020
Continuation 16387316 · Apr 17, 2019
Related Publication 20210273565A1 · Sep 2, 2021
Cited By (1)
US 12,476,542