High output power density radio frequency transistor amplifiers in flat no-lead overmold packages
Packaged RF transistor amplifiers are provided that include a flat no-lead overmold package that includes a die pad, a plurality of terminal pads and an overmold encapsulation that at least partially covers the die pad and the terminal pads and an RF transistor amplifier die mounted on the die pad and at least partially covered by the overmold encapsulation. These packaged RF transistor amplifiers may have an output power density of at least 3.0 W/mm 2 .
1. A packaged radio frequency (“RF”) transistor amplifier, comprising:
a flat no-lead overmold package that includes a die pad, a plurality of terminal pads and an overmold encapsulation that at least partially covers the die pad and the terminal pads; and
an RF transistor amplifier die mounted on the die pad and at least partially covered by the overmold encapsulation,
wherein the RF transistor amplifier die includes at least one RF transistor amplifier circuit that comprises a gate-drain-gate spacing of less than 45 microns.
2. The RF transistor amplifier of claim 1 , wherein an output power density rating of the packaged RF transistor amplifier is between 3.0 W/mm 2 and 5.5 W/mm 2 .
3. The RF transistor amplifier of claim 1 , wherein the RF transistor amplifier die is a monolithic microwave integrated circuit (“MMIC”) RF transistor amplifier die.
4. The RF transistor amplifier of claim 3 , wherein the MMIC RF transistor amplifier die includes a first stage RF transistor amplifier and a second stage RF transistor amplifier that are electrically connected in series.
5. The RF transistor amplifier of claim 4 , wherein the MMIC RF transistor amplifier die further includes an input matching network that is coupled between an RF input of the MMIC RF transistor amplifier die and the first stage RF transistor amplifier, an interstage matching network that is coupled between the first stage RF transistor amplifier and the second stage RF transistor amplifier, and an output matching network that is coupled between the second stage RF transistor amplifier and an output of the MMIC RF transistor amplifier die.
6. A packaged radio frequency (“RF”) transistor amplifier, comprising:
a flat no-lead package that includes a die pad, a plurality of terminal pads and an overmold encapsulation that at least partially covers the die pad and the terminal pads; and
a monolithic microwave integrated circuit (“MMIC”) RF transistor amplifier die mounted on the die pad and at least partially covered by the overmold encapsulation,
wherein a surface area of the flat no lead package is less than 80 mm 2 and an output power of the packaged RF transistor amplifier is at least 200 Watts.
7. The RF transistor amplifier of claim 6 , wherein the MMIC RF transistor amplifier die is configured to amplify RF signals having frequencies in a 3.1-3.5 GHz frequency band.
8. A packaged radio frequency (“RF”) transistor amplifier, comprising:
a flat no-lead package that includes a die pad, a plurality of terminal pads and an overmold encapsulation that at least partially covers the die pad and the terminal pads; and
an RF transistor amplifier die mounted on the die pad, wherein an upper surface and side surfaces of the RF transistor amplifier die are covered by the overmold encapsulation,
wherein the RF transistor amplifier die includes at least one RF transistor amplifier circuit having a gate-drain-gate spacing of less than 45 microns, and
wherein an output power density rating of the packaged RF transistor amplifier is at least 3.5 W/mm 2 .
9. The RF transistor amplifier of claim 8 , wherein an operating frequency of the packaged RF transistor amplifier is greater than 2.5 GHz.
10. The RF transistor amplifier of claim 9 , wherein the output power density rating of the packaged RF transistor amplifier is between 3.5 W/mm 2 and 5.0 W/mm 2 .
11. The RF transistor amplifier of claim 10 , wherein the RF transistor amplifier die includes a first stage RF transistor amplifier and a second stage RF transistor amplifier that are electrically connected in series.
12. The RF transistor amplifier of claim 11 , wherein the RF transistor amplifier die further includes an input matching network that is coupled between an RF input of the RF transistor amplifier die and the first stage RF transistor amplifier, an interstage matching network that is coupled between the first stage RF transistor amplifier and the second stage RF transistor amplifier, and an output matching network that is coupled between the second stage RF transistor amplifier and an output of the RF transistor amplifier die.
13. The RF transistor amplifier of claim 8 in combination with a printed circuit board that includes a die attach pad and a plurality of landing pads, wherein the die pad is attached to the die attach pad and the terminal pads are attached to respective ones of the landing pads.
14. The RF transistor amplifier of claim 13 , wherein the printed circuit board further includes an array of conductive vias that are underneath the die attach pad.
15. The RF transistor amplifier of claim 2 , wherein the output power density rating of between 3.5 W/mm 2 and 5.0 W/mm 2 is achieved with the RF transistor amplifier operating at a duty cycle of at least 15%.
16. The RF transistor amplifier of claim 15 , wherein the output power density rating of between 3.5 W/mm 2 and 5.0 W/mm 2 is achieved with the RF transistor amplifier operating at a duty cycle of between 10% and 50%.
17. The RF transistor amplifier of claim 16 , wherein the output power density rating of between 3.5 W/mm 2 and 5.0 W/mm 2 is achieved with the RF transistor amplifier operating at a pulse width of between 100 and 500 microseconds.
18. The RF transistor amplifier of claim 6 , wherein an output power of the packaged RF transistor amplifier is at least 200 Watts when the RF transistor amplifier operating at a duty cycle of at least 15%.
19. The RF transistor amplifier of claim 18 , wherein the output power of at least 200 Watts is achieved with the RF transistor amplifier operating at a duty cycle of between 10% and 50%.
20. The RF transistor amplifier of claim 8 , wherein the output power density rating of at least 3.5 W/mm 2 is achieved with the RF transistor amplifier operating at a duty cycle of at least 15%.
21. The RF transistor amplifier of claim 20 , wherein the output power density rating of at least 3.5 W/mm 2 is achieved with the RF transistor amplifier operating at a duty cycle of between 10% and 50%.
22. The packaged RF transistor amplifier of claim 6 , wherein the MMIC RF transistor amplifier die includes at least one RF transistor amplifier circuit that comprises a gate-drain-gate spacing of less than 45 microns.