Capacitor and DRAM device including the same
A capacitor and a DRAM device, the capacitor including a lower electrode; a dielectric layer structure on the lower electrode, the dielectric layer structure including a first zirconium oxide layer, a hafnium oxide layer, and a second zirconium oxide layer sequentially stacked; and an upper electrode on the dielectric layer structure, wherein the hafnium oxide layer has a tetragonal crystal phase or an orthorhombic crystal phase.
1. A capacitor, comprising:
a lower electrode;
a dielectric layer structure on the lower electrode, the dielectric layer structure including a first zirconium oxide layer, a hafnium oxide layer, and a second zirconium oxide layer sequentially stacked; and
an upper electrode on the dielectric layer structure,
wherein the first zirconium oxide layer is between the hafnium oxide layer and the lower electrode and the second zirconium oxide layer is between the hafnium oxide layer and the upper electrode,
wherein the hafnium oxide layer is sandwiched directly between the first zirconium oxide layer and the second zirconium oxide layer,
wherein the dielectric layer structure further includes an interface layer, the interface layer being between the first zirconium oxide layer and the lower electrode and directly contacting the lower electrode, and
wherein the interface layer includes a ZrNbOx layer, a TiNbOx layer, or a stacked structure of the TiNbOx layer and the ZrNbOx layer, the material of the interface layer being different from that of the first zirconium oxide layer and the second zirconium oxide layer.
2. The capacitor as claimed in claim 1 , wherein the first zirconium oxide layer and the second zirconium oxide layer are each crystalline.
3. The capacitor as claimed in claim 2 , wherein the first zirconium oxide layer and the second zirconium oxide layer have a tetragonal crystal phase.
4. The capacitor as claimed in claim 1 , wherein the hafnium oxide layer has a thickness of about 5 Å to about 18 Å.
5. The capacitor as claimed in claim 1 , wherein each of the first zirconium oxide layer and the second zirconium oxide layer independently has a thickness of about 5 Å to about 30 Å.
6. The capacitor as claimed in claim 1 , wherein the dielectric layer structure has a thickness of about 20 Å to about 60 Å.
7. The capacitor as claimed in claim 1 , wherein the dielectric layer structure further includes an insert layer and a third zirconium oxide layer, the insert layer including an oxide of Al, Ta, Nb, Mo, W, Ru, V, Y, Sc, or Gd.
8. The capacitor as claimed in claim 7 , wherein the insert layer and the third zirconium oxide layer are amorphous.
9. The capacitor as claimed in claim 1 , wherein the lower electrode includes a metal, a metal nitride, or a conductive oxide.
10. A capacitor, comprising:
a lower electrode;
a dielectric layer structure on the lower electrode, the dielectric layer structure including a first zirconium oxide layer, a hafnium oxide layer, and a second zirconium oxide layer sequentially stacked; and
an upper electrode on the dielectric layer structure,
wherein:
the dielectric layer structure has a thickness of about 20 Å to about 60 Å,
the hafnium oxide layer has a thickness of about 5 Å to about 18 Å,
each of the first zirconium oxide layer and the second zirconium oxide layer independently has a thickness of about 5 Å to about 30 Å,
the dielectric layer structure further includes an interface layer, the interface layer being between the first zirconium oxide layer and the lower electrode and directly contacting the lower electrode, and
the interface layer includes a ZrNbOx layer, a TiNbOx layer, or a stacked structure of the TiNbOx layer and the ZrNbOx layer, the material of the interface layer being different from that of the first zirconium oxide layer and the second zirconium oxide layer.
11. The capacitor as claimed in claim 10 , wherein the hafnium oxide layer has a tetragonal crystal phase or an orthorhombic crystal phase.
12. The capacitor as claimed in claim 10 , wherein the first zirconium oxide layer and the second zirconium oxide layer each have a tetragonal crystal phase.
13. The capacitor as claimed in claim 10 , wherein:
the dielectric layer structure further includes an insert layer and a third zirconium oxide layer, and
the insert layer includes an oxide of Al, Ta, Nb, Mo, W, Ru, V, Y, Sc, or Gd.
14. A dynamic random-access memory (DRAM) device, comprising:
a substrate;
a cell transistor on the substrate, the cell transistor including a gate structure, a first impurity region, and a second impurity region;
a bit line structure electrically connected to the first impurity region; and
a capacitor on the bit line structure, the capacitor being electrically connected to the second impurity region,
wherein the capacitor includes:
a lower electrode;
a dielectric layer structure on the lower electrode, the dielectric layer structure including a first zirconium oxide layer, a hafnium oxide layer, and a second zirconium oxide layer sequentially stacked and further includes an interface layer, the interface layer being between the first zirconium oxide layer and the lower electrode and directly contacting the lower electrode; and
an upper electrode on the dielectric layer structure,
wherein the dielectric layer structure has a thickness of about 20 Å to about 60 Å, and
wherein the interface layer includes a ZrNbOx layer, a TiNbOx layer, or a stacked structure of the TiNbOx layer and the ZrNbOx layer, the material of the interface layer being different from that of the first zirconium oxide layer and the second zirconium oxide layer.
15. The DRAM device as claimed in claim 14 , wherein the first zirconium oxide layer and the second zirconium oxide layer are each crystalline.