IP Library Granted Patent US 11,677,371
Granted Patent B2
US 11,677,371 · App. 17/247,279 · Granted Jun 13, 2023

Offset compensation circuitry for an amplification circuit

Inventor: Jean-Paul Anna Joseph Eggermont (Pellaines, BE)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H03F3/45977H03F3/45475H03F2200/375
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Quick Facts
Patent No.
US 11,677,371
App. No.
17/247,279
Granted
Jun 13, 2023
Kind
B2
Abstract

Offset compensation circuitry for an amplification circuit. One example embodiment is a method of compensating a primary operational amplifier including: creating, by way of a companion circuit, a square wave having an amplitude, a period, and a direct current bias (DC bias), the amplitude proportional to an offset of the primary operational amplifier; integrating, by the companion circuit, the amplitude of the square wave for less than the period of the square wave, the integrating creates a compensation signal; and applying the compensation signal to the primary operational amplifier.

Claims (57)

1. A method of compensating a primary operational amplifier comprising:

creating, by way of a companion circuit, a square wave having an amplitude, a period, and a direct current bias (DC bias), the amplitude proportional to an offset of the primary operational amplifier;

integrating, by the companion circuit, an amplitude of the square wave for less than the period of the square wave, the integrating creates a compensation signal; and

applying the compensation signal to the primary operational amplifier.

2. The method of claim 1 further comprising:

applying a feedback signal across a first input and a second input of the primary operational amplifier;

selectively applying the feedback signal across a first input and a second input of a sense amplifier, the sense amplifier is distinct from the primary operational amplifier; and

generating, at an output of the sense amplifier, the square wave.

3. The method of claim 2 wherein the selectively applying the feedback signal further comprises:

applying the feedback signal to the first and second inputs with a first polarity; and then

applying the feedback signal to the first and second inputs with a second polarity opposite the first polarity.

4. The method of claim 2 wherein the selectively applying the feedback signal further comprises selectively applying the feedback signal across the first and second inputs of the sense amplifier being an operational transconductance amplifier.

5. The method of claim 1 wherein the integrating the amplitude of the square wave further comprises integrating for half the period or less.

6. The method of claim 5 wherein the integrating the amplitude of the square wave further comprises integrating the square wave across a single state transition of the square wave.

7. The method of claim 6 wherein applying the compensation signal further comprises applying a voltage developed across a capacitor to the primary operational amplifier.

8. An operational amplifier system comprising:

a primary operational amplifier defining a first primary input, a compensation input, and a primary output;

a sense amplifier defining a first sense input, and a sense output;

a pulse generator defining a pulse output, the pulse generator configured to drive a clock signal to the pulse output, the clock signal having a period that includes a first clock transition and a second clock transition;

an input switch network defining a control input coupled to the pulse output, the input switch network coupled between the first primary input and the first sense input, the input switch network configured to couple the first primary input to the first sense input when the control input is asserted, and configured to de-couple the first primary input from the first sense input when the control input is de-asserted;

an integrating amplifier defining a integration input coupled to the sense output, a integration output, and a feedback capacitor coupled between the integration output and the integration input, a lead of the feedback capacitor coupled to the compensation input; and

the integrating amplifier configured to drive a compensation voltage on the feedback capacitor for a time duration that includes the first clock transition.

9. The operational amplifier system of claim 8 further comprising:

the primary operational amplifier further defines a second primary input;

the sense amplifier further defines a second sense input;

the input switch network is further coupled between the second primary input and the second sense input;

the input switch network is further configured to couple the second primary input to the second sense input when the control input is asserted, and configured to cross-couple the first and second primary inputs to the first and second sense inputs when the control input is de-asserted.

10. The operational amplifier system of claim 8 wherein integrating amplifier is configured to generate the compensation voltage for the time duration being half the period or less.

11. The operational amplifier system of claim 8 further comprising:

the pulse generator defining a pre-charge output, the pulse generator configured to drive a pre-charge signal to the pre-charge output, the pre-charge signal having the period and a phase;

a feedback switch network defining a control input coupled to the pre-charge output, the feedback switch network coupled to the integration output, the feedback capacitor, and the integration input;

the feedback switch network configured to couple the integration output to the feedback capacitor when the pre-charge signal is asserted, and to couple the integration output to the integration input when the control input is de-asserted;

wherein the integrating amplifier is configured to generate the compensation voltage when the integration output is coupled the feedback capacitor by the feedback switch network, and the integrating amplifier is configured to pre-charge the integration input with a reference voltage when the integration output is coupled to the integration input.

12. The operational amplifier system of claim 8 further comprising an electrically-controlled switch coupled between the sense amplifier and the integrating amplifier, the electrically-controlled switch configured to de-couple the sense amplifier from the integrating amplifier for a blanking period that includes the first clock transition.

13. An electronic circuit comprising:

a primary operational amplifier defining a first primary input, a compensation input, and a primary output;

a feedback circuit coupled between the primary output and the first primary input;

a companion circuit configured to:

create a square wave having an amplitude, a period, and a direct current bias (DC bias), the amplitude proportional to an offset of the primary operational amplifier;

integrate an amplitude of the square wave for less than the period of the square wave, the integrating creates a compensation signal; and

applying the compensation signal to the primary operational amplifier.

14. The electronic circuit of claim 13 wherein the companion circuit further comprises:

a sense amplifier defining a first sense input, a second sense input, and a sense output;

an input switch network coupled between the first primary input and the first and second sense inputs, the input switch network configured to selectively couple the first primary input to the first sense input or the second sense input; and

the sense amplifier configured to generate, at the sense output, the square wave.

15. The electronic circuit of claim 14 further comprising:

the primary operational amplifier further defines a second primary input;

wherein the input switch network is further configured to:

couple the first and second primary inputs to the first and second sense inputs with a first polarity; and then

couple the first and second primary inputs to the first and second sense inputs with a second polarity opposite the first polarity.

16. The electronic circuit of claim 14 wherein the sense amplifier is an operational transconductance amplifier.

17. The electronic circuit of claim 13 wherein when the companion circuit integrates the amplified of the square wave, the companion circuit is further configured to integrate for half the period or less.

18. The electronic circuit of claim 17 further comprising:

an integrating operational amplifier having a capacitive feedback;

the integrating operational amplifier configured to perform the integration.

19. The electronic circuit of claim 18 wherein when the companion circuit applies the compensation signal, the companion circuit is further configured to apply a voltage developed across the capacitive feedback to the primary operational amplifier.

20. The electronic circuit of claim 17 wherein when the companion circuit integrates the square wave, the companion circuit is further configured to integrate the square wave across a single state transition of the square wave.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 055315, FRAME 0350 Recorded Aug 17, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064618/0881 →
SECURITY INTEREST Recorded Feb 17, 2021
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 055315/0350 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2020
From: EGGERMONT, JEAN-PAUL ANNA JOSEPH
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 054564/0707 →
Continuity (2)
Provisional Application 63061951 · Aug 6, 2020
Related Publication 20220045657A1 · Feb 10, 2022