Circuit and method for programming a one-time programmable memory
Programming a fuse for a one-time programmable (OTP) memory can require applying a programming current for a programming period to increase a resistance of the fuse. It may be desirable for the resistance to be very high. A very high resistance may be achieved by applying a high programming current to form a void in the fuse. Applying the high programming current too long after the void is formed, however, may lead to uncontrolled variations and ultimately damage. Accordingly, it may be desirable to end the programming period sometime after the void is formed but before the uncontrolled variations begin. Ideally the programming period is ended at a time at which the programming current is minimum. The disclosed circuits and method provide a means to estimate this time without requiring the complexity of sensing very low levels of programming current.
1. A method for programming a fuse, the method comprising:
controlling a switch device to begin a programming period by allowing a programming current to flow in a fuse;
monitoring a voltage corresponding to the programming current flowing in the fuse;
detecting a change in the voltage;
starting a baking period after the change in the voltage is detected; and
controlling, after the baking period, the switch device to end the programming period by substantially blocking the programming current.
2. The method for programming a fuse according to claim 1 wherein at a start of the baking period the fuse has a first resistance and at an end of the baking period the fuse has a second resistance, the second resistance higher than the first resistance.
3. The method for programming a fuse according to claim 1 wherein the detecting the change in the voltage includes:
detecting when the voltage drops below a threshold voltage as a time corresponding to a formation of a void in the fuse.
4. The method for programming a fuse according to claim 3 , wherein the programming period varies from fuse to fuse according to the formation of the void in the fuse.
5. The method for programming a fuse according to claim 3 , wherein at a start of the baking period, a first number of conductive filaments span the void and at an end of the baking period a second number of conductive filaments span the void, the second number of conductive filaments less than the first number of conductive filaments.
6. The method for programming a fuse according to claim 1 , wherein the baking period is less than 100 nanoseconds.
7. The method for programming a fuse according to claim 1 , wherein the fuse is substantially polysilicon at a start of the programming period and is substantially amorphous silicon and includes a void at an end of the programming period.
8. The method for programming a fuse according to claim 1 , wherein at an end of the programming period the fuse has a post-trimmed resistance of greater than or equal to 1 mega-Ohm.
9. The method for programming a fuse according to claim 1 , wherein the baking period is a fixed period that does not change for each fuse programmed and the programming period is adaptable and can change for each fuse programmed.
10. A system for programming a fuse, the system comprising:
a fuse coupled to a programming voltage at a first end and to a transistor at a second end, the transistor switched to an ON condition to start a programming period, during which a programming current is allowed by the transistor to flow through the fuse; and
a closed loop programming control circuit coupled at an input to the second end of the fuse and at an output to a controlling terminal of the transistor, the closed loop programming control circuit including:
a trigger circuit configured to generate a trigger signal upon detecting a programming condition corresponding to the fuse at the input;
a delay circuit configured to delay the trigger signal from the trigger circuit for a baking period; and
a switch control circuit configured to receive a delayed trigger signal from the delay circuit, and upon receiving the delayed trigger signal, switching the transistor to an OFF condition to end the programming period.
11. The system for programming a fuse according to claim 10 , wherein the programming condition corresponds to a drop in a voltage at the second end of the fuse.
12. The system for programming a fuse according to claim 11 , wherein the drop in the voltage at the second end of the fuse corresponds to a formation of a void in the fuse.
13. The system for programming the fuse according to claim 12 , wherein the programming period is variable and depends on a length of time necessary for the void in the fuse to form.
14. The system for programming a fuse according to claim 10 , wherein the switch control circuit includes a set-reset latch.
15. The system for programming a fuse according to claim 14 , wherein the set-reset latch is configured to receive a trim enable signal at a set terminal and the delayed trigger signal at a reset terminal, the set-reset latch configured to configure the transistor in the ON condition when set and configure the transistor in the OFF condition when reset.
16. The system for programming a fuse according to claim 15 , wherein the switch control circuit further includes a lead edge blanking circuit (LEB circuit) coupled to the set terminal of the set-reset latch, the LEB circuit configured to prevent the set-reset latch from being reset for a lead-edge-blanking period (LEB period) after being set.
17. The system for programming the fuse according to claim 10 , wherein the trigger circuit includes a comparator configured to compare a voltage at the second end of the fuse to a threshold voltage.
18. A closed loop programming control circuit comprising:
a trigger circuit configured to receive a voltage from a fuse during programming and generate a trigger signal upon detecting a drop in the voltage from the fuse during programming to below a threshold level;
a delay circuit configured to delay the trigger signal from the trigger circuit for a baking period; and
a switch control circuit configured to receive a delayed trigger signal from the delay circuit, and upon receiving the delayed trigger signal, transmitting a signal to end programming of the fuse.
19. The closed loop programming control circuit according to claim 18 wherein the drop in the voltage from the fuse being programmed corresponds to an increase in a resistance of the fuse being programmed.
20. The closed loop programming control circuit according to claim 19 , wherein the resistance of the fuse being programmed further increases during the baking period to a resistance greater than one mega-ohm.