Metal-oxide-semiconductor capacitor based charge sharing successive approximation register data converter
An image sensor may include an analog-to-digital converter. The converter may have a input capacitor, one or more metal-oxide-semiconductor capacitors, a digital-to-analog converter, and a comparator. An input signal may be sampled onto the input capacitor while the metal-oxide-semiconductor capacitors are activated. A few conversion steps may be performed while the metal-oxide-semiconductor capacitors are activated. After the few conversion steps, the metal-oxide-semiconductor capacitors are deactivated to realize a voltage gain, which makes the converter less sensitive to comparator noise.
1. An image sensor, comprising:
an image sensor pixel;
a column line configured to receive a signal from the image sensor pixel; and
a data converter coupled to the column line, wherein the data converter comprises:
a first input port;
a second input port;
a comparator having a first input coupled to the first input port and having a second input coupled to the second input port;
a digital-to-analog converter coupled to at least one of the first and second inputs of the comparator;
a sampling capacitor having a first terminal coupled to the first input port and having a second terminal coupled to the second input port; and
a metal-oxide-semiconductor capacitor having source-drain terminals coupled to the first input port and a gate terminal configured to receive a control signal.
2. The image sensor of claim 1 , wherein the data converter further comprises:
a first sampling switch coupled between the first input port and the first terminal of the sampling capacitor;
a second sampling switch coupled between the second input port and the second terminal of the sampling capacitor;
a first additional metal-oxide-semiconductor capacitor having source-drain terminals coupled to the first terminal of the capacitor and a gate terminal configured to receive an inverted version of the control signal;
a second additional metal-oxide-semiconductor capacitor having source-drain terminals coupled to the second terminal of the capacitor and a gate terminal configured to receive the control signal; and
a third additional metal-oxide-semiconductor capacitor having source-drain terminals coupled to the second terminal of the capacitor and a gate terminal configured to receive the inverted version of the control signal.
3. The image sensor of claim 2 , wherein:
the metal-oxide-semiconductor capacitor and the second additional metal-oxide-semiconductor capacitor comprise n-type metal-oxide-semiconductor capacitors; and
the second metal-oxide-semiconductor capacitor and the fourth additional metal-oxide-semiconductor capacitor comprise p-type metal-oxide-semiconductor capacitors.
4. The image sensor of claim 1 , wherein the digital-to-analog converter comprises capacitors sized using a sub-radix-2 scaling scheme.
5. The image sensor of claim 1 , further comprising:
a first additional metal-oxide-semiconductor capacitor having source-drain terminals coupled to the second input port and a gate terminal configured to receive the control signal.
6. The image sensor of claim 5 , further comprising:
a second additional metal-oxide-semiconductor capacitor having source-drain terminals coupled to the first input port and a gate terminal configured to receive an inverted version of the control signal.
7. The image sensor of claim 6 , further comprising:
a third additional metal-oxide-semiconductor capacitor having source-drain terminals coupled to the second input port and a gate terminal configured to receive the inverted version of the control signal.
8. The image sensor of claim 1 , further comprising:
an additional metal-oxide-semiconductor capacitor having source-drain terminals coupled to the first input port and a gate terminal configured to receive an inverted version of the control signal.
9. The image sensor of claim 1 , wherein the metal-oxide-semiconductor capacitor is activated during a charge sampling phase.
10. The image sensor of claim 1 , wherein the metal-oxide-semiconductor capacitor is activated during a first number of conversion cycles.
11. The image sensor of claim 10 , wherein the metal-oxide-semiconductor capacitor is deactivated prior to a second number of conversion cycles following the first number of conversion cycles to provide a voltage gain.
12. A method of operating an image sensor, comprising:
reading a signal from an image sensor pixel;
conveying the signal through a column line;
with a data converter, receiving the signal from the column line;
with the data converter, activating a metal-oxide-semiconductor capacitor; and
with the data converter, sampling the received signal while the metal-oxide-semiconductor capacitor is activated.
13. The method of claim 12 , further comprising:
with the data converter, performing a first number of conversions;
after performing the first number of conversions, using the data converter to provide a voltage gain by deactivating the metal-oxide-semiconductor capacitor; and
after deactivating the metal-oxide-semiconductor capacitor, performing a second number of conversions with the data converter.
14. The method of claim 13 , wherein the first number is equal to zero, one, two, three, four, five or six.
15. The method of claim 12 , further comprising:
with the data converter, providing a voltage gain by deactivating the metal-oxide-semiconductor capacitor.
16. The method of claim 12 , further comprising:
with the data converter, precharging digital-to-analog converter capacitors prior to activating the metal-oxide-semiconductor capacitor.
17. The method of claim 12 , further comprising:
with the data converter, precharging digital-to-analog converter capacitors after activating the metal-oxide-semiconductor capacitor.
18. A data converter, comprising:
an input port;
a comparator having an input coupled to the input port;
a digital-to-analog converter coupled to the input of the comparator; and
a metal-oxide-semiconductor capacitor having source-drain terminals coupled to the input port and having a gate terminal configured to receive a control signal that is asserted during a charge sampling phase and that is subsequently deasserted to provide a voltage gain.
19. The data converter of claim 18 , further comprising:
a sampling capacitor coupled to the input port; and
an additional metal-oxide-semiconductor capacitor having source-drain terminals coupled to the source-drain terminals of the metal-oxide-semiconductor capacitor and having a gate terminal configured to receive an inverted version of the control signal.
20. The data converter of claim 18 , further comprising:
an additional input port, wherein the comparator has an additional input coupled to the additional input port; and
an additional metal-oxide-semiconductor capacitor having source-drain terminals coupled to the additional input port and having a gate terminal configured to receive the control signal.