Offline functional coverage collection

1. A computer-implemented method for determining functional coverage of stimulus data used for simulating an integrated circuit design, the method comprising:

for each of a plurality of functional simulations used to verify the integrated circuit design:

generating the stimulus data that causes the integrated circuit design to perform a function;

running a functional simulation by inputting the stimulus data into the integrated circuit design, and verifying that the integrated circuit design performed the function correctly; and

saving the stimulus data in a stimulus database;

subsequent to running the plurality of functional simulations, reading, by a coverage testbench, the stimulus data stored in the stimulus database;

determining, by the coverage testbench, coverage data from the stimulus data for each of the functional simulations using a coverage model, the coverage model comprising coverage points based on a specification of the integrated circuit design; and

aggregating, by the coverage testbench, the coverage data based on the coverage points to determine the functional coverage.

2. The computer-implemented method of claim 1 , further comprising:

determining that the functional coverage contains a gap;

generating new stimulus data that causes the integrated circuit design to perform a function that covers the gap;

running a new functional simulation by inputting the new stimulus data into the integrated circuit design; and

storing the new stimulus data to the stimulus database.

3. The computer-implemented method of claim 2 , further comprising:

reading, by the coverage testbench, the new stimulus data from the stimulus database; and

re-aggregating, by the coverage testbench, the coverage data to include coverage of the new stimulus data.

4. The computer-implemented method of claim 1 , wherein the stimulus data is generated randomly.

5. A computer-implemented method, comprising:

reading, by a coverage testbench, stored stimulus data from a database for a design-under-test (DUT), wherein the stimulus data was previously used for running simulations on the DUT;

accessing, by the coverage testbench, a coverage model to determine coverage data for each of the simulations based on the stimulus data;

aggregating, by the coverage testbench, the coverage data to determine functional coverage of the simulations for the DUT; and

providing, by the coverage testbench, the functional coverage of the DUT based on the aggregated coverage data.

6. The computer-implemented method of claim 5 , further comprising:

accessing, by the coverage testbench, an updated coverage model based on changes made to the DUT or to the coverage model to determine updated coverage data;

aggregating, by the coverage testbench, the updated coverage data; and

providing, by the coverage testbench, updated functional coverage of the DUT without re-running the simulations.

7. The computer-implemented method of claim 5 , wherein aggregating the coverage data from the stimulus data using the coverage model is performed separately from running the simulations on the DUT.

8. The computer-implemented method of claim 5 , wherein the coverage model is generated based on a specification of the DUT.

9. The computer-implemented method of claim 5 , wherein at least a portion of the stimulus data is generated randomly using constraints.

10. The computer-implemented method of claim 5 , wherein a portion of the stimulus data was generated prior to running the simulations.

11. The computer-implemented method of claim 5 , wherein a runtime for aggregating the coverage data from the stimulus data is about one percent of a runtime for running the simulations on the DUT.

12. The computer-implemented method of claim 5 , wherein the coverage testbench or the coverage model is implemented using a scripting language.

13. The computer-implemented method of claim 5 , wherein the coverage testbench is part of an electronic design automation (EDA) tool, and the coverage model includes hardware verification language (HVL) constructs supported by the EDA tool for aggregating the coverage data.

14. The computer-implemented method of claim 5 , wherein the coverage data includes coverage points based on an implementation of the DUT.

15. The computer-implemented method of claim 5 , wherein the aggregated coverage data indicates which valid combinations of inputs to the DUT were used in the simulations.

16. A non-transitory computer readable medium having stored therein instructions that, when executed by one or more processors, cause the one or more processors to execute a method comprising:

reading stored stimulus data from a database for a design-under-test (DUT), wherein the stimulus data was previously used for running simulations on the DUT;

accessing a coverage model to determine coverage data for each of the simulations based on the stimulus data;

aggregating the coverage data to determine functional coverage of the simulations for the DUT; and

providing the functional coverage of the DUT based on the aggregated coverage data.

17. The non-transitory computer readable medium of claim 16 , further comprising:

accessing an updated coverage model based on changes made to the DUT or to the coverage model to determine updated coverage data;

aggregating the updated coverage data; and

providing updated functional coverage of the DUT without re-running the simulations.

18. The non-transitory computer readable medium of claim 16 , wherein aggregating the coverage data from the stimulus data using the coverage model is performed separately from running the simulations on the DUT.

19. The non-transitory computer readable medium of claim 16 , wherein the aggregated coverage data indicates which valid combinations of inputs to the DUT were used in the simulations.

20. The non-transitory computer readable medium of claim 16 , wherein the DUT is a register transfer language (RTL) model of an integrated circuit device.