IP Library › Granted Patent US 12,027,494
Granted Patent B2
US 12,027,494 · App. 17/314,017 · Granted Jul 2, 2024

Semiconductor device and manufacturing method thereof

Inventors: Hao-Yi Tsai (Hsinchu, TW); Tzuan-Horng Liu (Taoyuan, TW); Chien-Ling Hwang (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L25/0657H01L21/56H01L23/31H01L23/49816H01L23/5384H01L23/5385H01L24/14
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Quick Facts
Patent No.
US 12,027,494
App. No.
17/314,017
Granted
Jul 2, 2024
Kind
B2
Abstract

A semiconductor device includes an integrated circuit, first conductive features, second conductive features, a package structure, and an encapsulant. The integrated circuit has an active surface and a rear surface opposite to the active surface. The first conductive features surround the integrated circuit. The second conductive features are stacked on the first conductive features. The package structure is disposed on the second conductive features and the rear surface of the integrated circuit. The encapsulant laterally encapsulates the integrated circuit, the first conductive features, the second conductive features, and the package structure.

Claims (43)

1. A semiconductor device, comprising:

an integrated circuit having an active surface and a rear surface opposite to the active surface;

first conductive features surrounding the integrated circuit, wherein each of the first conductive features is elliptical in a cross-sectional view;

second conductive features stacked on the first conductive features, wherein a material of the first conductive features is different from a material of the second conductive features;

a package structure disposed on the second conductive features and the rear surface of the integrated circuit; and

an encapsulant laterally encapsulating the integrated circuit, the first conductive features, the second conductive features, and the package structure.

2. The semiconductor device of claim 1 , wherein the material of the first conductive features comprises copper and the material of the second conductive features comprises solder.

3. The semiconductor device of claim 1 , wherein a shape of the first conductive features is different from a shape of the second conductive features.

4. The semiconductor device of claim 1 , wherein the first conductive features comprise elliptical conductive balls and the second conductive features comprise spherical conductive balls.

5. The semiconductor device of claim 1 , further comprising:

a redistribution structure disposed on the first conductive features and the active surface of the integrated circuit; and

conductive terminals disposed on the redistribution structure.

6. The semiconductor device of claim 1 , further comprising an adhesive layer sandwiched between the rear surface of the integrated circuit and the package structure, wherein the encapsulant laterally encapsulates the adhesive layer.

7. The semiconductor device of claim 6 , wherein sidewalls of the adhesive layer are aligned with sidewalls of the integrated circuit.

8. A semiconductor device, comprising:

an integrated circuit;

conductive structures surrounding the integrated circuit, wherein each of the conductive structures comprises a first portion and a second portion connected to the first portion, the first portion is elliptical in a cross-sectional view, and a material of the first portion is different from a material of the second portion;

a package structure disposed on the conductive structures and the integrated circuit; and

a first encapsulant laterally encapsulating the integrated circuit, the conductive structures, and the package structure, wherein a top surface of the first encapsulant is coplanar with a top surface of the package structure.

9. The semiconductor device of claim 8 , wherein an interface exists between the first portion and the second portion.

10. The semiconductor device of claim 8 , wherein a maximum width of the first portion is different from a maximum width of the second portion.

11. The semiconductor device of claim 8 , wherein the integrated circuit comprises:

a first die;

a second die stacked on and hybrid bonded to the first die; and

a second encapsulant laterally encapsulating the second die.

12. The semiconductor device of claim 8 , further comprising:

a redistribution structure disposed on the conductive structures and the integrated circuit opposite to the package structure;

conductive terminals disposed on the redistribution structure; and

an adhesive layer sandwiched between the integrated circuit and the package structure.

13. The semiconductor device of claim 12 , wherein a height of the conductive structures is substantially equal to a sum of a thickness of the adhesive layer and a thickness of the integrated circuit.

14. The semiconductor device of claim 12 , wherein sidewalls of the adhesive layer are aligned with sidewalls of the integrated circuit.

15. The semiconductor device of claim 8 , wherein the first portion comprises an elliptical conductive ball and the second portion comprises a spherical conductive ball.

16. A manufacturing method of a semiconductor device, comprising:

providing a package structure having first conductive features formed thereon;

forming second conductive features on the first conductive features, wherein each of the second conductive features is elliptical in a cross-sectional view, and a material of the first conductive features is different from a material of the second conductive features;

attaching an integrated circuit to the package structure, wherein the integrated circuit has an active surface and a rear surface opposite to the active surface, the integrated circuit is surrounded by the first conductive features and the second conductive features, and the rear surface of the integrated circuit is attached to the package structure;

encapsulating the package structure, the first conductive features, the second conductive features, and the integrated circuit by an encapsulant; and

sequentially forming a redistribution structure and conductive terminals on the second conductive features, the integrated circuit, and the encapsulant.

17. The method of claim 16 , wherein forming the second conductive features precedes encapsulating the package structure, the first conductive features, the second conductive features, and the integrated circuit.

18. The method of claim 16 , wherein forming the second conductive features comprises:

placing pre-formed elliptical conductive balls onto the first conductive features.

19. The method of claim 16 , wherein the integrated circuit is attached to the package structure through a thermal interfacial material (TIM) layer.

20. The method of claim 16 , wherein the first conductive features comprise spherical conductive balls and the second conductive features comprise elliptical conductive balls.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 11, 2021
From: TSAI, HAO-YI; LIU, TZUAN-HORNG; HWANG, CHIEN-LING
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 056506/0958 →
Continuity (1)
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