IP Library › Granted Patent US 11,557,525
Granted Patent B2
US 11,557,525 · App. 17/330,336 · Granted Jan 17, 2023

Semiconductor package thermal spreader having integrated RF/EMI shielding and antenna elements

Inventors: Zhiwei Gong (Chandler, AZ); Scott M. Hayes (Chandler, AZ); Michael B. Vincent (Chandler, AZ); Betty Hill-Shan Yeung (Chandler, AZ); Rushik P. Tank (Chandler, AZ); Kabir Mirpuri (Scottsdale, AZ)
Assignee: NXP USA, INC.
H01L23/3672H01L21/4882H01L23/552H01L23/66H01L2223/6677
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Quick Facts
Patent No.
US 11,557,525
App. No.
17/330,336
Granted
Jan 17, 2023
Kind
B2
Abstract

A cost-effective process and structure is provided for a thermal dissipation element for semiconductor device packages incorporating antennas that can incorporate RF/EMI shielding from the antenna elements. Certain embodiments provide incorporated antenna element structures as part of the same process. These features are provided using a selectively-plated thermal dissipation structure that is formed to provide shielding around semiconductor device dies that are part of the package. In some embodiments, the thermal dissipation structure is molded to the semiconductor device, thereby permitting a thermally efficient close coupling between a device die requiring thermal dissipation and the dissipation structure itself.

Claims (23)

1. A method for forming a semiconductor device package, the method comprising:

thermally coupling a portion of a first major surface of a heat spreader element to an exposed surface of a semiconductor device die of a semiconductor device;

applying a mold compound to a gap region between the first major surface of the heat spreader element and an exposed surface of the semiconductor device; and

etching a second major surface of the heat spreader element subsequent to said applying the mold compound, wherein

the second major surface comprises selective plating in a region opposite the portion of the heat spreader element in thermal contact with the semiconductor device die,

said etching forms one or more structures in the selectively plated portion of the second major surface, and

said etching forms a heat spreader in contact with the semiconductor device die.

2. The method of claim 1 wherein said thermally coupling comprises using a thermally conductive material between the exposed surface of the semiconductor device die and the portion of the first major surface of the heat spreader element.

3. The method of claim 1 , wherein

the semiconductor device comprises one or more antenna structures, and

said etching forms one or more openings in the heat spreader element in a region above each of the one or more antenna structures.

4. The method of claim 1 , wherein

the semiconductor device comprises one or more antenna contacts,

the second major surface of the heat spreader element comprises antenna selective plating in regions corresponding to the one or more antenna contacts, and

said etching forms an antenna structure in the regions under the antenna selective plating.

5. The method of claim 1 further comprising:

forming the heat spreader element from a thermally-conductive metal, wherein said forming comprises one of stamping or etching.

6. The method of claim 5 wherein said forming the heat spreader element further comprises forming one or more shielding structures on the first major surface of the heat spreader element.

7. The method of claim 6 wherein the one or more shielding structures are configured to provide electromagnetic shielding between devices comprised on a substrate of the semiconductor device package.

8. The method of claim 1 , wherein the structures are configured to enhance thermal dissipation characteristics of the heat spreader.

9. The method of claim 1 further comprising attaching contacts to a bottom-side major surface of the semiconductor device package subsequent to said etching.

10. The method of claim 1 , wherein the heat spreader element is one of a strip of heat spreader elements applied to a corresponding set of non-singulated semiconductor device packages.

11. The method of claim 10 further comprising singulating the semiconductor device package subsequent to said etching.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2021
From: HAYES, SCOTT M; YEUNG, BETTY HILL-SHAN; GONG, ZHIWEI; MIRPURI, KABIR; TANK, RUSHIK P; VINCENT, MICHAEL B
To: NXP USA, INC.
Reel/Frame 056349/0386 →
Continuity (1)
Related Publication 20220384299A1 · Dec 1, 2022
Cited By (3)
US 12,542,358 US 12,557,221 US 12,744,322