IP Library Granted Patent US 11,561,254
Granted Patent B2
US 11,561,254 · App. 17/332,952 · Granted Jan 24, 2023

Topside contact device and method for characterization of high electron mobility transistor (HEMT) heterostructure on insulating and semi-insulating substrates

Inventors: Marshall Wilson (Tampa, FL); Bret Schrayer (Tampa, FL); Alexandre Savtchouk (Tampa, FL); Dmitriy Marinskiy (Tampa, FL); Jacek Lagowski (Tampa, FL)
Assignee: SEMILAB Semiconductor Physics Laboratory Co., Ltd.
G01R31/2656G01R1/06727G01R31/2601
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Quick Facts
Patent No.
US 11,561,254
App. No.
17/332,952
Granted
Jan 24, 2023
Kind
B2
Abstract

Methods of characterizing electrical properties of a semiconductor layer structure on a wafer with topside semiconductor layers on an insulating or semi-insulating substrate, the semiconductor layer structure including a high electron mobility transistor (HEMT) heterostructure with a two-dimensional electron gas (2DEG) at a heterointerface between the semiconductor layers of the heterostructure. The methods include: (a) physically contacting the topside of the wafer within a narrow border zone at an edge of the wafer with a flexible metal cantilever electrode of a contacting device, wherein the flexible metal cantilever electrode contacts one or more of the semiconductor layers exposed at the narrow border zone so that the flexible metal cantilever electrode is in electrical contact with the 2DEG; and (b) applying corona charge bias and measuring a surface voltage of the semiconductor layers using a non-contact probe while maintaining the electrical contact with the 2DEG. The physical contacting to the topside of the wafer is noncontaminating and noninvasive to the semiconductor layers.

Claims (13)

1. A method of characterizing electrical properties of a semiconductor layer structure on a wafer comprising semiconductor layers disposed on an insulating or semi-insulating substrate, the semiconductor layers being on a topside of the wafer and the semiconductor layer structure comprising a high electron mobility transistor (HEMT) heterostructure with a two-dimensional electron gas (2DEG) at a heterointerface between the semiconductor layers of the HEMT heterostructure, the method comprising:

physically contacting the topside of the wafer within a narrow border zone at an edge of the wafer with a flexible metal cantilever electrode of a contacting device, wherein the flexible metal cantilever electrode contacts one or more of the semiconductor layers of the HEMT heterostructure exposed at the narrow border zone so that the flexible metal cantilever electrode is in electrical contact with the 2DEG of the heterointerface; and

applying corona charge bias and measuring a surface voltage of the semiconductor layers using a non-contact probe while maintaining the electrical contact with the 2DEG of the heterointerface,

wherein the physical contacting to the topside of the wafer is noncontaminating and noninvasive to the semiconductor layers.

2. The method of claim 1 , wherein the electrical contact of the flexible metal cantilever electrode to the 2DEG of the heterointerface electrically connects the semiconductor layers to a ground potential.

3. The method of claim 1 , wherein multiple doses of corona charge are applied and the surface voltage is measured after each dose, and the electrical properties of the semiconductor layers are characterized based on the surface voltage measurements and doses of corona charge.

4. The method of claim 3 , wherein a capacitance-voltage characteristic of the semiconductor layers is determined based on the surface voltage measurements and doses of corona charge, and a quality of the topside contact is assessed using a relative standard deviation value of the capacitance in a flat segment of the capacitance-voltage characteristic as a criterion.

5. The method of claim 1 , wherein the semiconductor layers comprise an AlGaN layer on top of a GaN layer, the interface between the AlGaN layer and GaN layer defining a 2DEG of the HEMT heterostructure.

6. The method of claim 1 , wherein the edge of the wafer is at a wafer flat.

7. The method of claim 1 , wherein the wafer is located on an electrically-conducting wafer chuck.

8. The method of claim 7 , wherein the contacting device is recessed in the chuck and comprises a moveable post, the cantilever electrode being attached to the post.

9. The method of claim 8 , further comprising actuating the post to raise the flexible metal cantilever electrode above the topmost surface of the wafer during loading and unloading the wafer from the chuck.

10. The method of claim 8 , wherein physically contacting the topside of the wafer with the flexible metal cantilever electrode comprises lowering the post to contact an end portion of the flexible metal cantilever against the topside of the wafer within the border zone at the wafer edge, the flexible metal cantilever extending over the topside of the wafer less than one millimeter from the edge.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 13, 2025
From: SEMILAB SEMICONDUCTOR PHYSICS LABORATORY CO., LTD.
To: SEMILAB USA, LLC
Reel/Frame 072891/0915 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2025
From: SEMILAB SEMICONDUCTOR PHYSICS LABORATORY CO., LTD.
To: SEMILAB SDI
Reel/Frame 070349/0780 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 4, 2021
From: WILSON, MARSHALL; SCHRAYER, BRET; SAVTCHOUK, ALEXANDRE; MARINSKIY, DMITRIY; LAGOWSKI, JACEK
To: SEMILAB SEMICONDUCTOR PHYSICS LABORATORY CO., LTD.
Reel/Frame 056439/0307 →
Continuity (1)
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