IP Library › Granted Patent US 12,057,469
Granted Patent B2
US 12,057,469 · App. 17/333,660 · Granted Aug 6, 2024

Semiconductor device and a method of fabricating the same

Inventors: Yu-Chiun Lin (Taipei, TW); Po-Nien Chen (Miaoli, TW); Chen Hua Tsai (Hsinchu County, TW); Chih-Yung Lin (Hsinchu County, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H01L28/24H01L21/32051H01L21/823821H01L23/5228H01L27/0207H01L27/0629H01L27/0924H01L29/1079H01L29/1095H01L29/6681H01L29/785H01L21/823431H01L21/823493H01L29/66545H01L29/7851
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Quick Facts
Patent No.
US 12,057,469
App. No.
17/333,660
Granted
Aug 6, 2024
Kind
B2
Abstract

A semiconductor device includes a substrate having a first conductivity type, a first well formed in the substrate and having a second conductivity type, a first diffusion region formed in the first well and having the first conductivity type, a first interlayer dielectric layer disposed over the first well and the first diffusion region, and a resistor wire formed of a conductive material and embedded in the first interlayer dielectric layer. The resistor wire overlaps the first diffusion region and at least partially overlaps the first well in plan view.

Claims (48)

1. A semiconductor device, comprising:

a substrate in which a first capacitor structure is disposed;

a first interlayer dielectric layer disposed over the substrate;

a resistor wire formed of one of TiN, TaN, or TiSiN and embedded in the first interlayer dielectric layer,

wherein the resistor wire forms a second capacitor structure with the substrate such that the first capacitor structure and the second capacitor structure form series connection,

wherein the first capacitor structure is formed by a first diffusion region and a well both formed in the substrate,

the second capacitor structure is formed by the resistor wire and the first diffusion region,

multiple first diffusion regions are provided under the resistor wire, and

each of the multiple first diffusion regions is disposed between two dummy structures formed on the substrate in plan view.

2. The semiconductor device of claim 1 , wherein the two dummy structures are two dummy gate electrodes.

3. The semiconductor device of claim 1 , wherein the substrate comprises a second diffusion region, in which the first diffusion region is disposed.

4. The semiconductor device of claim 3 , wherein the resistor wire overlaps the first diffusion region and the second diffusion region in plan view.

5. The semiconductor device of claim 1 , wherein the resistor wire is formed of TiSiN.

6. The semiconductor device of claim 1 , wherein no dummy gate structure is disposed over the first diffusion region.

7. The semiconductor device of claim 1 , the first diffusion region is an epitaxial layer doped with BF 2 or In at a doping concentration of 1×10 14 to 1×10 16 atoms/cm 3 .

8. A semiconductor device, comprising:

a substrate;

a first fin structure formed above the substrate;

a first diffusion region formed in the first fin structure;

one or more interlayer dielectric layers disposed over the first fin structure;

first and second dummy structures disposed over the first fin structure; and

a resistor wire formed of a conductive material, embedded in one of the one or more interlayer dielectric layers and disposed over the first diffusion layer and the first and second dummy structures.

9. The semiconductor device of claim 8 , wherein the first diffusion region and the first fin structure other than the first diffusion region have different conductivity types from each other.

10. The semiconductor device of claim 8 , wherein the first diffusion region is disposed between the two dummy structures.

11. The semiconductor device of claim 10 , further comprising a third dummy structure disposed over the first diffusion region.

12. The semiconductor device of claim 10 , wherein the first and second dummy structures are dummy gate structures.

13. The semiconductor device of claim 12 , wherein no dummy gate structure is disposed over the first diffusion region.

14. The semiconductor device of claim 8 , the first diffusion region is an epitaxial layer doped with BF 2 or In at a doping concentration of 1×10 14 to 1×10 16 atoms/cm 3 .

15. A semiconductor device comprising:

a substrate having a first conductivity type;

a first well formed in the substrate and having a second conductivity type;

a first interlayer dielectric layer disposed over the substrate;

a first resistor wire and a second resistor wire, each formed of one of TiN, TaN or TiSiN and embedded in the first interlayer dielectric layer;

one or more first diffusion regions formed in the first well below the first resistor wire and having the first conductivity type;

one or more second diffusion regions formed in the first well below the second resistor wire and having the first conductivity type;

one or more first dummy structures disposed over the first well below the first resistor wiring; and

one or more second dummy structures disposed over the first well below the second resistor wire.

16. The semiconductor device of claim 15 , wherein the one or more first diffusion regions are separated from the one or more second diffusion regions.

17. The semiconductor device of claim 16 , wherein:

multiple first diffusion regions are disposed below the first resistor wiring, and

only one second diffusion region is disposed below the second resistor wiring.

18. The semiconductor device of claim 15 , wherein:

the one or more first dummy structures comprise a pair of first dummy gate structures, and

the one or more second dummy structures comprise a pair of second dummy gate structures.

19. The semiconductor device of claim 18 , wherein:

the one or more first diffusion regions are disposed between the first pair of dummy gate structures, and

the one or more second diffusion regions are disposed between the second pair of dummy gate structures.

20. The semiconductor device of claim 15 , the first diffusion region is an epitaxial layer doped with BF 2 or In at a doping concentration of 1×10 14 to 1×10 16 atoms/cm 3 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2021
From: LIN, YU-CHIUN; CHEN, PO-NIEN; TSAI, CHEN HUA; LIN, CHIH-YUNG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 056384/0598 →
Continuity (5)
Continuation 16914528 · Jun 29, 2020
Continuation 16512315 · Jul 15, 2019
Continuation 15593479 · May 12, 2017
Provisional Application 62440081 · Dec 29, 2016
Related Publication 20210288137A1 · Sep 16, 2021