Solder resist structure for embedded die packaging of power semiconductor devices
Embedded die packaging for high voltage, high temperature operation of power semiconductor devices is disclosed, wherein a power semiconductor die is embedded in package body comprising dielectric layers and electrically conductive layers, and where an external dielectric coating, such as a solder resist coating is provided on one or both external sides of the package body. The solder resist coating is patterned to avoid inside corners, e.g. the solder resist does not extend around or between electrical contact areas and thermal pads. It is observed that in conventional solder resist coatings, during thermal cycling, cracks tend to initiate at high stress points, such as at sharp inside corners. A solder resist layout which omits inside corners, and comprises outside corners only, is demonstrated to provide significantly improved resistance to initiation and propagation of cracks. Where inside corners are unavoidable, they are appropriately radiused to reduce stress.
1. An embedded die package comprising a power semiconductor device embedded in a package body, the power semiconductor device having external contact areas on at least one side of the package body, and an external dielectric coating, comprising a solder resist layer or other dielectric layer, on said at least one side of the package body, wherein the external dielectric coating layer is patterned without inside corners.
2. The embedded die package of claim 1 , wherein the external dielectric coating does not extend around or between said external contact areas.
3. The embedded die package of claim 1 , wherein the external dielectric coating is removed from areas around and between contact areas, to eliminate inside corners.
4. The embedded die package of claim 1 , wherein the external dielectric coating is patterned to have outside corners only.
5. The embedded die package of claim 1 , wherein the package body comprises a laminated package body.
6. The embedded die package of claim 1 , wherein said contact areas comprise any one of an electrical contact area and a thermal contact area.
7. The embedded die package of claim 1 , wherein said contact areas have rounded or chamfered corners.
8. The embedded die package of claim 1 , wherein said contact areas are rectangular with rounded corners.
9. An embedded die package comprising an embedded die package comprising a power semiconductor device embedded in a package body, the power semiconductor device having external contact areas provided on at least one side of the package body, and an external dielectric coating, comprising a solder resist layer or other dielectric layer, on said at least one side of the body laminated body, wherein the external dielectric coating is patterned to avoid inside corners.
10. The embedded die package of claim 9 , wherein the external dielectric coating does not extend over areas of the package body around and between the contact areas.
11. The embedded die package of claim 9 , wherein the external dielectric coating is removed from areas around and between contact areas, to eliminate inside corners.
12. The embedded die package of claim 9 , wherein the external dielectric coating is patterned to have outside corners only.
13. The embedded die package of claim 9 , wherein the package body comprises a laminated package body.
14. The embedded die package of claim 9 , wherein the external dielectric coating is patterned to minimize inside corners, and in areas where inside corners are unavoidable, said inside corners are radiused.
15. The embedded die package of claim 9 , wherein said contact areas comprise any one of an electrical contact area and a thermal contact area.
16. The embedded die package of claim 9 , wherein said contact areas have rounded or chamfered corners.
17. The embedded die package of claim 9 , wherein said contact areas are rectangular with rounded corners.
18. The embedded die package of claim 9 , wherein any inside corners of the external dielectric coating are radiused to reduce stress.
19. The embedded die package of claim 9 , wherein said contact areas have rounded or chamfered corners and where the external dielectric coating extends around or between said contact areas to form an inside corner, the inside corners are radiused to reduce stress.