IP Library › Granted Patent US 12,216,485
Granted Patent B2
US 12,216,485 · App. 17/369,974 · Granted Feb 4, 2025

Output circuit and related control method with pumping compensation

Inventor: Jen-Yi Lin (Hsinchu, TW)
Assignee: NOVATEK Microelectronics Corp.
G05F1/56
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Quick Facts
Patent No.
US 12,216,485
App. No.
17/369,974
Granted
Feb 4, 2025
Kind
B2
Abstract

An output circuit includes an output driver, a voltage regulator, a control circuit and a charge pump circuit. The output driver includes a signal input terminal, a signal output terminal and a first power receiving terminal. The voltage regulator is coupled to the first power receiving terminal of the output driver. The control circuit is coupled to the signal input terminal of the output driver. The charge pump circuit is coupled to the control circuit and the first power receiving terminal of the output driver.

Claims (20)

1. An output circuit, comprising:

an output driver, comprising a signal input terminal, a signal output terminal and a first power receiving terminal, to output a digital signal through the signal output terminal;

a voltage regulator, coupled to the first power receiving terminal of the output driver, to supply power to the output driver through the first power receiving terminal;

a control circuit, coupled to the signal input terminal of the output driver; and

a charge pump circuit, coupled to the control circuit and the first power receiving terminal of the output driver, to output compensation charges to the output driver through the same first power receiving terminal;

wherein the charge pump circuit is configured to output the compensation charges to the first power receiving terminal of the output driver according to an input/output (I/O) internal signal of the output driver.

2. The output circuit of claim 1 , wherein the charge pump circuit comprises:

a first switch, coupled to the control circuit and a voltage source;

a second switch, coupled to the control circuit and the first power receiving terminal of the output driver; and

a pumping capacitor, coupled between the first switch and the second switch.

3. The output circuit of claim 2 , wherein the control circuit is configured to generate control signals for controlling the first switch and the second switch according to the I/O internal signal of the output driver.

4. The output circuit of claim 1 , wherein the output driver further comprises a second power receiving terminal, and the charge pump circuit comprises:

a first switch, coupled to the control circuit and a voltage source;

a second switch, coupled to the control circuit and the first power receiving terminal of the output driver;

a third switch, coupled to the control circuit and the voltage source;

a fourth switch, coupled to the control circuit and the second power receiving terminal of the output driver; and

a pumping capacitor, coupled between the first switch, the second switch, the third switch and the fourth switch.

5. The output circuit of claim 4 , wherein the control circuit is configured to generate control signals for controlling the first switch, the second switch, the third switch and the fourth switch according to the I/O internal signal of the output driver.

6. The output circuit of claim 1 , wherein the voltage regulator is a low-dropout (LDO) regulator.

7. The output circuit of claim 1 , wherein the output driver is configured to drive a digital output interface.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 8, 2021
From: LIN, JEN-YI
To: NOVATEK MICROELECTRONICS CORP.
Reel/Frame 056783/0589 →
Continuity (1)
Related Publication 20230010835A1 · Jan 12, 2023
References Cited (32)
US 6741099B1 · Krugly · 2004 [cited by examiner]
US 6903538B2 · Umeda · 2005 [cited by examiner]
US 9899912B2 · Raghupathy · 2018 [cited by applicant]
US 10073478B1 · Ivanov · 2018 [cited by applicant]
US 10454376B1 · Watanabe · 2019 [cited by examiner]
US 10680514B2 · Watanabe · 2020 [cited by examiner]
US 11196339B1 · Jodka · 2021 [cited by examiner]
US 20020109488A1 · Umeda · 2002 [cited by examiner]
US 20040041620A1 · D'Angelo · 2004 [cited by examiner]
US 20050174815A1 · Chen · 2005 [cited by examiner]
US 20070146050A1 · Chen · 2007 [cited by examiner]
US 20090015299A1 · Ryu · 2009 [cited by examiner]
US 20090167418A1 · Raghavan · 2009 [cited by examiner]
US 20110057704A1 · Ptacek · 2011 [cited by examiner]
US 20110148388A1 · Zanchi · 2011 [cited by examiner]
US 20150061738A1 · Kwon · 2015 [cited by examiner]
US 20150066230A1 · Ulrich · 2015 [cited by examiner]
US 20150311784A1 · Saadat · 2015 [cited by examiner]
US 20180026629A1 · Ptacek · 2018 [cited by examiner]
US 20180175855A1 · Romano · 2018 [cited by examiner]
US 20180212514A1 · Ippolito · 2018 [cited by examiner]
US 20180321718A1 · Kaundinya · 2018 [cited by examiner]
US 20180352327A1 · Onishi · 2018 [cited by examiner]
US 20190028095A1 · Sanchez · 2019 [cited by examiner]
US 20190207603A1 · Ptacek · 2019 [cited by examiner]
US 20190305686A1 · Watanabe · 2019 [cited by examiner]
US 20200285260A1 · Londak · 2020 [cited by examiner]
US 20200310746A1 · Kopparapu · 2020 [cited by examiner]
US 20200389082A1 · Feng · 2020 [cited by examiner]
US 20210083573A1 · Yen · 2021 [cited by examiner]
US 20230088177A1 · Giuliano · 2023 [cited by examiner]
TW 200828311 · 2008 [cited by applicant]