GaN vertical-channel junction field-effect transistors with regrown p-GaN by metal organic chemical vapor deposition (MOCVD)
Fabricating a vertical-channel junction field-effect transistor includes forming an unintentionally doped GaN layer on a bulk GaN layer by metalorganic chemical vapor deposition, forming a Cr/SiO 2 hard mask on the unintentionally doped GaN layer, patterning a fin by electron beam lithography, defining the Cr and SiO 2 hard masks by reactive ion etching, improving a regrowth surface with inductively coupled plasma etching, removing hard mask residuals, regrowing a p-GaN layer, selectively etching the p-GaN layer, forming gate electrodes by electron beam evaporation, and forming source and drain electrodes by electron beam evaporation. The resulting vertical-channel junction field-effect transistor includes a doped GaN layer, an unintentionally doped GaN layer on the doped GaN layer, and a p-GaN regrowth layer on the unintentionally doped GaN layer. Portions of the p-GaN regrowth layer are separated by a vertical channel of the unintentionally doped GaN layer.
1. A method of fabricating a vertical-channel junction field-effect transistor, the method comprising:
forming an unintentionally doped GaN layer on a bulk GaN layer by metalorganic chemical vapor deposition;
forming a Cr/SiO 2 hard mask on the unintentionally doped GaN layer;
patterning a fin by electron beam lithography;
defining the Cr/SiO 2 hard mask by reactive ion etching;
improving a regrowth surface with inductively coupled plasma etching;
removing hard mask residuals;
regrowing a p-GaN layer;
selectively etching the p-GaN layer;
forming gate electrodes by electron beam evaporation; and
forming source and drain electrodes by electron beam evaporation.
2. The method of claim 1 , wherein the unintentionally doped GaN layer is homoepitaxially grown.
3. The method of claim 1 , wherein the bulk GaN layer is doped.
4. The method of claim 1 , wherein the fin is aligned to an a-plane or an m-plane.
5. The method of claim 1 , wherein the hard mask residuals are removed by Cr etchant and hydrofluoric acid.
6. The method of claim 1 , further comprising cleaning after removing the hard mask residuals.
7. The method of claim 6 , wherein cleaning comprises dipping in tetramethylammonium hydroxide, immersing in piranha, treating with UV-ozone, performing a buffered oxide etch, treating with hydrochloric acid, or any combination thereof.
8. The method of claim 1 , wherein regrowing the p-GaN layer comprises metalorganic chemical vapor deposition.
9. The method of claim 1 , wherein the gate electrodes comprise Pd/Ni/Au.
10. The method of claim 1 , wherein the source and drain electrodes comprise Ti/Al/Ni.