Packaging substrate with core layer and cavity structure and semiconductor device comprising the same
A packaging substrate and a semiconductor device comprising a semiconductor element, include a core layer and an upper layer disposed on the core layer, and the core layer includes a glass substrate as a core of the packaging substrate to improve electrical properties such as a signal transmission rate by connecting the semiconductor element and a mother board to be closer to each other so that electrical signals are transmitted through as short a path as possible.
1. A packaging substrate comprising:
a core layer, and an upper layer disposed on the core layer,
wherein:
the core layer comprises a glass substrate and a core via,
the glass substrate has a first surface and a second surface facing each other,
the glass substrate comprises a first area with a first thickness, and a second area close to the first area and with a second thickness thinner than the first thickness,
the core via passing through the glass substrate in a thickness direction is disposed in a plural number,
the core layer comprises a core distribution layer disposed on a surface of the glass substrate or the core via,
at least a part of the core distribution layer electrically connects an electrically conductive layer of the first surface and an electrically conductive layer of the second surface, through the core via, and
the upper layer is disposed on the first surface and comprises an electrically conductive layer which electrically connects the core distribution layer and an external semiconductor element unit; and
a cavity unit disposed above or under the second area, the cavity unit comprising an inner space, a cavity distribution layer electrically connected to the core distribution layer, and a cavity element disposed in the inner space,
wherein the packaging substrate further comprises a supporting unit protruded to the inner space, in at least one surface of the cavity unit.
2. The packaging substrate of claim 1 , wherein the supporting unit has an arc-shape connecting one end and the other end of a side surface of the cavity unit.
3. The packaging substrate of claim 1 , wherein the supporting unit is at least partially connected to one surface in a thickness direction of the first area, and another part of the supporting unit is protruded to the inner space, fixing the position of a cavity element to be inserted.
4. The packaging substrate of claim 1 , wherein the supporting unit comprises a same material with the glass substrate.
5. The packaging substrate of claim 1 , wherein:
one side surface of the cavity unit is a cavity first side surface,
the other side surface different with the cavity first side surface, is a cavity second side surface, and
the supporting unit is respectively disposed at the cavity first side surface and the cavity second side surface.
6. The packaging substrate of claim 1 , wherein the cavity distribution layer comprises:
a cavity distribution pattern which is an electrically conductive layer electrically connected to the cavity element at least a part of which is disposed in the inner space, and electrically connected to the core distribution layer; and
a cavity insulating layer which is an insulating layer surrounding the cavity distribution pattern.
7. The packaging substrate of claim 1 , further comprising:
a heat-emitting unit disposed between the core layer and the cavity unit,
wherein the heat-emitting unit is disposed at a surface where the first area of the glass substrate and the inner space of the cavity unit are in contact.
8. The packaging substrate of claim 7 , wherein the heat-emitting unit is at least partially connected to the core distribution layer.
9. A semiconductor device comprising:
a semiconductor element unit where one or more semiconductor elements are disposed;
a packaging substrate electrically connected to the semiconductor element; and
a motherboard electrically connected to the packaging substrate, transmitting electrical signals of the semiconductor element and external, and connecting each other,
wherein the packaging substrate comprises:
a core layer, and an upper layer disposed on the core layer, and
wherein:
the core layer comprises a glass substrate and a core via,
the glass substrate has a first surface and a second surface facing each other,
the glass substrate comprises a first area with a first thickness, and a second area close to the first area and with a second thickness thinner than the first thickness,
the core via passing through the glass substrate in a thickness direction is disposed in a plural number,
the core layer comprises a core distribution layer disposed on a surface of the glass substrate or the core via,
at least a part of the core distribution layer electrically connects an electrically conductive layer of the first surface and an electrically conductive layer of the second surface, through the core via, and
the upper layer is disposed on the first surface and comprises an electrically conductive layer which electrically connects the core distribution layer and an external semiconductor element unit; and
a cavity unit disposed above or under the second area, the cavity unit comprising an inner space, a cavity distribution layer electrically connected to the core distribution layer, and a cavity element disposed in the inner space,
wherein the packaging substrate further comprises a supporting unit protruded to the inner space, in at least one surface of the cavity unit.