Method for making semiconductor device with selective etching of superlattice to define etch stop layer

1. A method for making a semiconductor device comprising:

forming a superlattice above a semiconductor layer, the superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions; and

selectively etching the superlattice to remove semiconductor atoms and cause non-semiconductor atoms to accumulate and define an etch stop layer.

2. The method of claim 1 further comprising epitaxially growing an active semiconductor layer above the etch stop layer.

3. The method of claim 1 further comprising removing the etch stop layer.

4. The method of claim 1 further comprising forming at least one other superlattice between the semiconductor layer and the superlattice layer, the at least one other superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

5. The method of claim 1 wherein selectively etching comprises chemical etching.

6. The method of claim 1 wherein selectively etching comprises plasma etching.

7. The method of claim 1 wherein the at least one non-semiconductor monolayer comprises a non-semiconductor selected from the group consisting of oxygen, nitrogen, fluorine, carbon and carbon-oxygen.

8. The method of claim 1 wherein the base semiconductor layers comprise silicon.

9. The method of claim 1 wherein the etch stop layer comprises at least one full monolayer of non-semiconductor atoms.

10. A method for making a semiconductor device comprising:

forming first and second superlattices above a semiconductor layer, the first and second superlattices each comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions;

selectively etching the second superlattice to remove semiconductor atoms and cause non-semiconductor atoms to accumulate and define an etch stop layer;

removing the etch stop layer; and

epitaxially growing an active semiconductor layer above the first superlattice.

11. The method of claim 10 wherein selectively etching comprises chemical etching.

12. The method of claim 10 wherein selectively etching comprises plasma etching.

13. The method of claim 10 wherein the at least one non-semiconductor monolayer comprises a non-semiconductor selected from the group consisting of oxygen, nitrogen, fluorine, carbon and carbon-oxygen.

14. The method of claim 10 wherein the base semiconductor layers comprise silicon.

15. A method for making a semiconductor device comprising:

forming a superlattice above a semiconductor layer, the superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions; and

selectively etching the superlattice to remove silicon atoms and cause oxygen atoms to accumulate and define an etch stop layer.

16. The method of claim 15 further comprising epitaxially growing an active silicon layer above the etch stop layer.

17. The method of claim 15 further comprising removing the etch stop layer.

18. The method of claim 15 further comprising forming at least one other superlattice between the semiconductor layer and the superlattice layer, the at least one other superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions.

19. The method of claim 15 wherein selectively etching comprises chemical etching.

20. The method of claim 15 wherein selectively etching comprises plasma etching.