IP Library › Granted Patent US 12,451,420
Granted Patent B2
US 12,451,420 · App. 17/455,698 · Granted Oct 21, 2025

Staircase-based metal-insulator-metal (MIM) capacitors

Inventors: Prashant Majhi (San Jose, CA); Anand Murthy (Portland, OR)
Assignee: Intel Corporation
H01L23/5223H10D1/692
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Quick Facts
Patent No.
US 12,451,420
App. No.
17/455,698
Granted
Oct 21, 2025
Kind
B2
Abstract

Multi-plate MIM capacitors include a staircase structure, with steps including a high-k capacitor dielectric and one or more electrode plates. Contacts pass through insulator fill material and land on the electrode plate of a respective step. A recess passes through the staircase structure. In some examples, the recess is filled with insulator material, and steps of the staircase structure have a bilayer structure (e.g., lower layer of capacitor dielectric and upper layer of capacitor electrode plate). In other examples, the recess is filled with conductive material. In such cases, steps of the staircase structure have a multilayer structure that includes an upper portion and a lower portion. The lower portion includes insulator material and the upper portion includes a layer of capacitor dielectric between first and second capacitor electrode plates, with the second capacitor electrode plates being continuous with, or otherwise in contact with, the conductive material in the recess.

Claims (57)

1. An integrated circuit comprising:

a staircase structure, wherein first and second steps included in the staircase structure each includes a high-k dielectric material layer and a conductive material layer, each conductive material layer being an electrode plate of a multi-plate capacitor;

an insulator fill material over the staircase structure;

a first contact that passes through the insulator fill material and is on the electrode plate of the first step;

a second contact that passes through the insulator fill material and is on the electrode plate of the second step; and

a structure that passes through each of the first and second steps of the staircase structure, wherein the structure comprises a conductive material and provides another electrode plate of the multi-plate capacitor.

2. The integrated circuit of claim 1 , further comprising an etch stop on the staircase structure, the etch stop including a high-k dielectric material, wherein the first and second contacts also pass through the etch stop.

3. The integrated circuit of claim 2 , wherein the high-k dielectric material of the etch stop is elementally distinct from the high-k dielectric material of the first and second steps of the staircase structure.

4. The integrated circuit of claim 1 , wherein:

the electrode plate of the first step is a first electrode plate of the first step, the first step further including a second electrode plate that is continuous with, or otherwise in contact with, the structure, and the high-k dielectric material layer of the first step is between the first and second electrodes of the first step; and

the electrode plate of the second step is a first electrode plate of the second step, the second step further including a second electrode plate that is continuous with, or otherwise in contact with, the structure, and the high-k dielectric material layer of the second step is between the first and second electrodes of the second step.

5. The integrated circuit of claim 1 , comprising:

a first conductive interconnect feature in contact with one or both of the first and second contacts; and

a second conductive interconnect feature in contact with the structure.

6. The integrated circuit of claim 1 , comprising:

a first conductive interconnect feature in contact with the first contact; and

a second conductive interconnect feature in contact with the second contact.

7. The integrated circuit of claim 6 , wherein the first conductive interconnect feature is in contact with a power rail, and the second conductive interconnect feature is in contact with a ground plane.

8. An integrated circuit comprising:

a device layer including a plurality of transistor devices;

an interconnect structure including one or more interconnect layers above or below the device layer;

a staircase structure included in one or more of the one or more interconnect layers, wherein first and second steps included in the staircase structure each includes a high-k dielectric material layer and a conductive material layer, each conductive material layer being an electrode plate of a multi-plate capacitor;

an insulator fill material over the staircase structure;

a first contact that passes through the insulator fill material and is on the electrode plate of the first step;

a second contact that passes through the insulator fill material and is on the electrode plate of the second step; and

a structure that passes through each of the first and second steps of the staircase structure, wherein the structure comprises a conductive material and provides another electrode plate of the multi-plate capacitor.

9. The integrated circuit of claim 8 , further comprising an etch stop on the staircase structure, wherein each of the first and second contacts also passes through the etch stop.

10. The integrated circuit of claim 8 , wherein:

the electrode plate of the first step is a first electrode plate of the first step, the first step further including a second electrode plate that is continuous with, or otherwise in contact with, the structure, and the high-k dielectric material layer of the first step is between the first and second electrodes of the first step; and

the electrode plate of the second step is a first electrode plate of the second step, the second step further including a second electrode plate that is continuous with, or otherwise in contact with, the structure, and the high-k dielectric material layer of the second step is between the first and second electrodes of the second step.

11. An integrated circuit comprising:

a staircase structure including a plurality of steps, wherein each of the steps included in the staircase structure each includes a high-k dielectric material layer and a conductive material layer, each conductive material layer being an electrode plate of a multi-plate capacitor;

an insulator fill material over the steps of the staircase structure;

a first contact that passes through the insulator fill material and is on the electrode plate of a first step of the staircase structure;

a second contact that passes through the insulator fill material and is on the electrode plate of a second step of the staircase structure;

a third contact that passes through the insulator fill material and is on the electrode plate of a third step of the staircase structure;

a fourth contact that passes through the insulator fill material and is on the electrode plate of a fourth step of the staircase structure; and

a conductive structure that passes through each of the steps of the staircase structure and provides another electrode plate of the multi-plate capacitor.

12. The integrated circuit of claim 9 , wherein the etch stop includes a high-k dielectric material and the high-k dielectric material of the etch stop is elementally distinct from the high-k dielectric material of the first and second steps of the staircase structure.

13. The integrated circuit of claim 8 , comprising:

a first conductive interconnect feature in contact with one or both of the first and second contacts; and

a second conductive interconnect feature in contact with the structure.

14. The integrated circuit of claim 8 , comprising:

a first conductive interconnect feature in contact with the first contact; and

a second conductive interconnect feature in contact with the second contact.

15. The integrated circuit of claim 14 , wherein the first conductive interconnect feature is in contact with a power rail, and the second conductive interconnect feature is in contact with a ground plane.

16. The integrated circuit of claim 11 , further comprising an etch stop on the staircase structure, the etch stop including a high-k dielectric material, wherein the first, second, third, and fourth contacts also pass through the etch stop.

17. The integrated circuit of claim 16 , wherein the high-k dielectric material of the etch stop is elementally distinct from the high-k dielectric material of the first, second, third, and fourth steps of the staircase structure.

18. The integrated circuit of claim 11 , comprising:

a first conductive interconnect feature in contact with any one or more of the first, second, third, and fourth contacts; and

a second conductive interconnect feature in contact with the conductive structure.

19. The integrated circuit of claim 11 , comprising:

a first conductive interconnect feature in contact with the first contact;

a second conductive interconnect feature in contact with the second contact;

a third conductive interconnect feature in contact with the third contact; and

a fourth conductive interconnect feature in contact with the fourth contact.

20. The integrated circuit of claim 19 , wherein at least one of the first, second, third, and fourth conductive interconnect features is in contact with a power rail, and at least one of the first, second, third, and fourth conductive interconnect features is in contact with a ground plane.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 19, 2021
From: MAJHI, PRASHANT; MURTHY, ANAND
To: INTEL CORPORATION
Reel/Frame 058163/0193 →
Continuity (1)
Related Publication 20230163063A1 · May 25, 2023
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