IP Library Granted Patent US 11,469,167
Granted Patent B2
US 11,469,167 · App. 17/460,966 · Granted Oct 11, 2022

Packaging substrate having electric power transmitting elements on non-circular core via of core vias and semiconductor device comprising the same

Inventors: Youngho Rho (Daejeon, KR); Sungjin Kim (Suwanee, GA); Jincheol Kim (Hwaseong-si, KR)
Assignee: ABSOLICS INC.
H01L23/49827H01L21/486H01L23/49838
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Quick Facts
Patent No.
US 11,469,167
App. No.
17/460,966
Granted
Oct 11, 2022
Kind
B2
Abstract

A packaging substrate includes a core layer including a glass substrate with a first surface and a second surface facing each other, and a plurality of core vias. The plurality of core vias penetrating through the glass substrate in a thickness direction, each comprising a circular core via having a circular opening part and a non-circular core via having a 1.2 or more aspect ratio in the x-y direction of an opening part. One or more electric power transmitting elements are disposed on the non-circular core via.

Claims (40)

1. A packaging substrate, comprising:

a core layer comprising a glass substrate with a first surface and a second surface facing each other; and

core vias respectively formed in the glass substrate and passing through the glass substrate in a thickness direction;

wherein the core vias comprise circular core vias each having a circle-shape opening part and non-circular core vias each having a 1.2 or more aspect ratio in a x-y direction of an opening part, and

wherein one or more electric power transmitting elements are disposed on each non-circular core via,

wherein the packaging substrate further comprises a non-circular via distribution pattern disposed inside each non-circular core via, and

wherein the non-circular via distribution pattern comprises:

any one or both of a filled-via pattern where all of an inner space of each non-circular core via is filled with an electrically conductive layer, and a composite-via pattern where some of the inner space of each non-circular core via is filled with an electrically conductive layer and the remainder is filled with an insulating layer.

2. The packaging substrate of claim 1 , wherein an electrically conductive layer with a minimum thickness of 5 μm or more is disposed inside each non-circular core via.

3. The packaging substrate of claim 1 , wherein an electrically conductive layer occupying 30% or more of an inner volume of each non-circular core via is disposed inside each non-circular core via.

4. The packaging substrate of claim 1 , wherein each non-circular core via comprises a shape of its opening part being oval-shape, quadrangle-shape, L-shape, or U-shape.

5. The packaging substrate of claim 1 , wherein the filled-via pattern comprises:

any one or both pattern of a filled-via pattern I where all the inner space of each non-circular core via is filled with the electrically conductive layer, and a filled-via pattern II where each non-circular core via comprises conformal-via pattern and all the inner space of each non-circular core via is filled with the electrically conductive layer.

6. The packaging substrate of claim 1 , wherein the composite-via pattern comprises:

any one or both of a composite-via pattern I where the electrically conductive layer is formed to substantially meet an inner diameter surface of each non-circular core via and the remainder inside each non-circular core via is filled with an insulating layer, and a composite-via pattern II where an insulating layer is formed to substantially meet the inner diameter surface of each non-circular core via and the electrically conductive layer is formed in a space other than the insulating layer.

7. The packaging substrate of claim 1 , wherein the electrically conductive layer of the non-circular via distribution pattern and an electrode of an electric power transmitting element are connected.

8. The packaging substrate of claim 1 , wherein each of the core vias comprises:

a first opening part in contact with the first surface;

a second opening part in contact with the second surface; and

a minimum inner diameter part having a smallest inner diameter and connecting the first opening part and the second opening part.

9. A semiconductor device, comprising:

a semiconductor element unit comprising one or more semiconductor elements;

a packaging substrate electrically connected to the semiconductor element unit; and

a motherboard electrically connected to the packaging substrate,

wherein the packaging substrate, comprising:

a core layer comprising a glass substrate with a first surface and a second surface facing each other; and

core vias respectively formed in the glass substrate and passing through the glass substrate in a thickness direction,

wherein the core vias comprise circular core vias each having a circle-shape opening part and non-circular core vias each having a 1.2 or more aspect ratio in a x-y direction of an opening part,

wherein one or more electric power transmitting elements are disposed on each non-circular core via, and

wherein the non-circular via distribution pattern comprises:

any one or both of a filled-via pattern where all of an inner space of each non-circular core via is filled with an electrically conductive layer, and a composite-via pattern where some of the inner space of each non-circular core via is filled with an electrically conductive layer and the remainder is filled with an insulating layer.

10. A packaging substrate, comprising:

a core layer comprising a glass substrate with a first surface and a second surface facing each other;

core vias respectively formed in the glass substrate and passing through the glass substrate in a thickness direction; and

wherein the core vias comprise circular core vias each having a circle-shape opening part and non-circular core vias each having a 1.2 or more aspect ratio in a x-y direction of an opening part,

wherein one or more electric power transmitting elements are disposed on each non-circular core via, and

wherein each of the core vias comprises:

a first opening part in contact with the first surface;

a second opening part in contact with the second surface; and

a minimum inner diameter part having a smallest inner diameter and connecting the first opening part and the second opening part.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2021
From: SKC CO., LTD.
To: ABSOLICS INC.
Reel/Frame 058354/0977 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 30, 2021
From: RHO, YOUNGHO; KIM, SUNGJIN; KIM, JINCHEOL
To: SKC CO., LTD.
Reel/Frame 057328/0677 →
Continuity (3)
Continuation PCTKR2020004898 · Apr 10, 2020
Provisional Application 62890689 · Aug 23, 2019
Related Publication 20210391243A1 · Dec 16, 2021