IP Library › Granted Patent US 11,881,407
Granted Patent B2
US 11,881,407 · App. 17/463,243 · Granted Jan 23, 2024

Processed wafer and method of manufacturing chip formation wafer

Inventors: Masatake Nagaya (Nisshin, JP); Teruaki Kumazawa (Nisshin, JP); Yuji Nagumo (Nisshin, JP); Kazuya Hirata (Tokyo, JP); Asahi Nomoto (Tokyo, JP)
Assignees: DENSO CORPORATION; TOYOTA JIDOSHA KABUSHIKI KAISHA; MIRISE Technologies Corporation; DISCO Corporation
H01L21/2683H01L21/02447H01L21/7813
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Quick Facts
Patent No.
US 11,881,407
App. No.
17/463,243
Granted
Jan 23, 2024
Kind
B2
Abstract

A method of manufacturing a chip formation wafer includes: forming an epitaxial film on a first main surface of a silicon carbide wafer to provide a processed wafer having one side adjacent to the epitaxial film and the other side; irradiating a laser beam into the processed wafer from the other side of the processed wafer so as to form an altered layer along a surface direction of the processed wafer; and separating the processed wafer with the altered layer as a boundary into a chip formation wafer having the one side of the processed wafer and a recycle wafer having the other side of the processed wafer. The processed wafer has a beveling portion at an outer edge portion of the processed wafer, and an area of the other side is larger than an area of the one side in the beveling portion.

Claims (30)

1. A method of manufacturing a chip formation wafer on which a semiconductor element is formed, the method comprising:

preparing a silicon carbide wafer made of silicon carbide and having a first main surface and a second main surface opposite to the first main surface;

forming an epitaxial film made of silicon carbide on the first main surface of the silicon carbide wafer to provide a processed wafer having one side adjacent to the epitaxial film and the other side made of the silicon carbide wafer;

irradiating a laser beam into the processed wafer from the other side of the processed wafer so as to form an altered layer along a surface direction of the processed wafer;

separating the processed wafer into a chip formation wafer having the one side of the processed wafer and a recycle wafer having the other side of the processed wafer with the altered layer as a boundary; and

reusing the recycle wafer as a silicon carbide wafer, wherein

the processed wafer has a beveling portion at an outer edge portion of the processed wafer,

an area of the other side is larger than an area of the one side in the beveling portion,

a depth from a boundary between the other side and the beveling portion to a side surface connecting the one side and the other side is shorter than a depth from the other side to the altered layer in a depth direction from the other side to the one side, in the preparing of the processed wafer, and

reusing the recycle wafer comprises

performing a chemical mechanical polishing process on the recycle wafer,

forming an epitaxial film on a surface of the recycle wafer, and

performing a shape adjustment process to form a beveling portion on the recycle wafer, wherein

an area of the recycle wafer after the shape adjustment process is performed is not less than an area of the processed wafer.

2. The method according to claim 1 , wherein

a virtual plane is defined along the surface direction of the processed wafer to pass through a center between the one side and the other side,

the beveling portion has a first portion located between the virtual plane and the other side, and a second portion located between the virtual plane and the one side, and

the beveling portion is formed so that a curvature of the first portion is larger than a curvature of the second portion, in the preparing of the processed wafer.

3. The method according to claim 1 , wherein

the depth from the other side to the altered layer in the depth direction from the other side to the one side is between 200 μm and 370 μm.

4. A processed wafer made of silicon carbide comprising:

a one side;

an other side opposite to the one side;

a beveling portion formed on a side surface connecting the one side and the other side at an outer edge portion of the silicon carbide; and

an altered layer at a position having a first depth from the other side, wherein

an area of the other side is larger than an area of the one side in the beveling portion,

a second depth from a boundary between the other side and the beveling portion to the side surface connecting the one side and the other side is shorter than the first depth from the other side to the altered layer in a depth direction from the other side to the one side, and

the altered layer extends to the beveling portion at the side surface of the processed wafer.

5. The processed wafer according to claim 4 , wherein

the first depth from the other side to the altered layer in the depth direction from the other side to the one side is between 200 μm and 370 μm.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2021
From: NAGAYA, MASATAKE; KUMAZAWA, TERUAKI; NAGUMO, YUJI; HIRATA, KAZUYA; NOMOTO, ASAHI
To: DENSO CORPORATION; TOYOTA JIDOSHA KABUSHIKI KAISHA; MIRISE TECHNOLOGIES CORPORATION; DISCO CORPORATION
Reel/Frame 057346/0846 →
Priority Claims (1)
JP 2020-180823 · Oct 28, 2020 · national
Continuity (1)
Related Publication 20220130675A1 · Apr 28, 2022
Cited By (5)
US 12,479,048 US 12,532,715 US 12,538,762 US 12,538,763 US 12,593,642