IP Library Granted Patent US 11,669,444
Granted Patent B2
US 11,669,444 · App. 17/475,025 · Granted Jun 6, 2023

Computing system and method for controlling storage device

Inventor: Shinichi Kanno (Tokyo, JP)
Assignee: Kioxia Corporation
G06F12/0246G06F3/061G06F3/064G06F3/0614G06F3/0631G06F3/0659G06F3/0679G06F3/0688G06F11/10G06F12/0253G06F12/0292G06F12/0891G06F2212/7201
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Quick Facts
Patent No.
US 11,669,444
App. No.
17/475,025
Granted
Jun 6, 2023
Kind
B2
Abstract

According to one embodiment, a computing system transmits to a storage device a write request designating a first logical address for identifying first data to be written and a length of the first data. The computing system receives from the storage device the first logical address and a first physical address indicative of both of a first block selected from blocks except a defective block by the storage device, and a first physical storage location in the first block to which the first data is written. The computing system updates a first table which manages mapping between logical addresses and physical addresses of the storage device and maps the first physical address to the first logical address.

Claims (43)

1. A storage device comprising:

a controller connectable to a host device; and

a plurality of nonvolatile memory dies, each of the plurality of nonvolatile memory dies including a plurality of memory blocks, wherein

the controller is configured:

to write data to the plurality of memory blocks;

to receive a write request and first data to be written from the host device, the write request designating a first logical address for identifying the first data and a length of the first data;

in response to receiving the write request, to select a first writable memory block from among memory blocks as a write destination block for the first data, and to write the first data to a first physical storage location in the first writable memory block; and

to transmit to the host device the first logical address and a first physical address, the first physical address being indicative of both of the first writable memory block and the first physical storage location in the first writable memory block to which the first data are written, for updating, by the host device, mapping between each of logical addresses and each of physical addresses of the storage device.

2. The storage device of claim 1 , wherein

the controller is configured:

to receive from the host device a read request designating the first physical address which is mapped to the first logical address by the host device.

3. The storage device of claim 1 , wherein

the controller is configured:

to copy the first data from a previous physical storage location to a new physical storage location; and

to transmit to the host device the first logical address, a second physical address indicative of the previous physical storage location, and a third physical address indicative of the new physical storage location, and wherein

the host device is configured:

to obtain a current physical address mapped to the first logical address;

to update the mapping such that the third physical address is mapped to the first logical address when the second physical address matches the obtained current physical address; and

to maintain the current physical address without updating the mapping when the second physical address does not match the obtained current physical address.

4. The storage device of claim 3 , wherein

in response to receiving a first command designating the second physical address from the host device, the controller is configured to invalidate data corresponding to the second physical address, after updating the mapping such that the third physical address is mapped to the first logical address.

5. The storage device of claim 1 , wherein

when the first data are updated data of previous data already written to the storage device, in response to receiving from the host device a first command designating a physical address corresponding to the previous data, the controller is configured to invalidate the previous data, after updating the mapping such that the first physical address is mapped to the first logical address.

6. The storage device of claim 1 , wherein

when the first data are updated data of previous data already written to the storage device and the previous data are duplicated data referred to by a plurality of logical addresses, in response to receiving from the host device a first command designating a physical address corresponding to the previous data, the controller is configured to decrement a reference count indicative of a number of logical addresses referring to the previous data, after updating the mapping such that the first physical address is mapped to the first logical address.

7. The storage device of claim 6 , wherein

the host device does not maintain the reference count.

8. A storage device comprising:

a controller connectable to a host device; and

a plurality of nonvolatile memory dies, each of the plurality of nonvolatile memory dies including a plurality of memory blocks, wherein

the controller is configured:

to read data from the plurality of memory blocks;

to receive from the host device a read request of first data written to a first memory block, the read request designating a first physical address which is indicative of both the first memory block and a first physical storage location in the first memory block to which the first data are written; and

in response to receiving the read request designating the first physical address, to transmit the first data to the host device without performing a logical-to physical address translation when reading of the first data, wherein

the controller is configured:

to copy the first data from a previous physical storage location to a new physical storage location; and

to transmit to the host device a first logical address corresponding to the first data, a second physical address indicative of the previous physical storage location, and a third physical address indicative of the new physical storage location, and wherein

the host device is configured:

to obtain a current physical address mapped to the first logical address;

to update mapping between each of logical addresses and each of physical addresses of the storage device such that the third physical address is mapped to the first logical address when the second physical address matches the obtained current physical address; and

to maintain the current physical address without updating the mapping when the second physical address does not match the obtained current physical address.

9. The storage device of claim 8 , wherein

in response to receiving a first command designating the second physical address from the host device, the controller is configured to invalidate data corresponding to the second physical address, after updating the mapping such that the third physical address is mapped to the first logical address.

Assignments (3)
MERGER AND CHANGE OF NAME Recorded Feb 17, 2022
From: TOSHIBA MEMORY CORPORATION; K.K. PANGEA
To: K.K. PANGEA
Reel/Frame 059039/0780 →
CHANGE OF NAME Recorded Feb 17, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 059175/0001 →
CHANGE OF NAME Recorded Feb 17, 2022
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 059180/0266 →
Priority Claims (1)
JP JP2017-209344 · Oct 30, 2017 · national
Continuity (3)
Continuation 16740680 · Jan 13, 2020
Continuation 16017195 · Jun 25, 2018
Related Publication 20210406173A1 · Dec 30, 2021