Glass substrates having signal shielding for use with semiconductor packages and related methods

1. A semiconductor package comprising:

a core layer including:

a first channel partially extending through a first surface of the core layer;

a second channel partially extending through a second surface of the core layer opposite the first surface, the second channel spaced from the first channel to provide a separation within the core layer between the first channel and the second channel; and

a through glass via (TGV), the first channel and the second channel at least partially surrounding the TGV;

a signal transmission line in the TGV and extending through the core layer; and

an electrically conductive material in the first channel and the second channel, the electrically conductive material to provide electromagnetic shielding to the signal transmission line.

2. The semiconductor package of claim 1 , wherein the core layer has a thickness between the first surface of the core layer and the second surface of the core layer, wherein the separation between the first channel and the second channel is less than the thickness.

3. The semiconductor package of claim 2 , wherein the first channel extends inwardly in a direction toward the second surface.

4. The semiconductor package of claim 3 , wherein at least one of the first channel or the second channel includes a continuous trench.

5. The semiconductor package of claim 3 , wherein at least one of the first channel or the second channel has an oblong shape.

6. The semiconductor package of claim 3 , including a plurality of vias in the core layer and extending through the first channel and the second channel.

7. The semiconductor package of claim 6 , wherein the vias are at least one of plated or filled with the conductive material.

8. The semiconductor package of claim 2 , wherein the first channel and the second channel completely surround surrounds the signal transmission line.

9. A semiconductor package comprising:

a glass substrate having:

a first opening extending between a first surface of the glass substrate and a second surface of the glass substrate; and

a first trench partially surrounding the first opening, the first trench having a first leg having a first end, a second leg having a second end, and a third leg interconnecting the first leg and the second leg, the first end spaced from the second end in a first direction across the first surface of the glass substrate, the glass substrate between the first end and the second end; and

a conductive material in the first opening and in the first trench, the conductive material in the first opening to provide a first signal path and the conductive material in the first trench to provide electromagnetic shielding for the first signal path.

10. The semiconductor package of claim 9 , wherein the first trench is in the first surface and completely extends from the first surface to the second surface.

11. The semiconductor package of claim 9 , wherein the first trench is a non-continuous trench and only partially surrounds the first signal path.

12. A method for fabricating a semiconductor package comprising:

providing an opening in a glass substrate;

providing a first trench partially extending through a first surface of the glass substrate, the first trench having a first wall, a second wall and a third wall connecting the first wall and the second wall, the first trench to at least partially surround the opening;

providing a second trench partially extending through a second surface of the glass substrate opposite the first surface, the second trench having a fourth wall, a fifth wall and a sixth wall, the sixth wall of the second trench spaced from the third wall of the first trench in a direction between the first surface and the second surface to provide a gap between the first trench and the second trench, the glass substrate extending within the gap between the first trench and the second trench;

filling the opening with a conductive material to define a signal line; and

filling the first trench and the second trench with the conductive material to provide an electromagnetic shield in the glass substrate to restrict electrical interference with the signal line.

13. The method of claim 12 , further including creating the first trench and the second trench to completely surround the opening.

14. The semiconductor package of claim 1 , wherein the first channel is defined by a first wall, a second wall and a third wall connecting the first wall and the second wall, and the second channel is defined by a fourth wall, a fifth wall and a sixth wall connecting the fourth wall and the fifth wall, the sixth wall of the second channel opposing the third wall of the first channel, the sixth wall spaced from the third wall.

15. The semiconductor package of claim 9 , wherein the glass substrate includes a second opening between the first surface of the glass substrate and the second surface of the glass substrate, the second opening spaced from the first opening.

16. The semiconductor package of claim 15 , including a second trench at least partially surrounding the second opening, the second trench having a fourth leg with a third end, a fifth leg having a fourth end, and a sixth leg interconnecting the fourth leg and the fifth leg, the third end spaced from the fourth end in the first direction across the first surface of the glass substrate, the glass substrate between the third end of the second trench and the fourth end of the second trench.

17. The semiconductor package of claim 16 , wherein the first trench is electrically isolated from the second trench.

18. The semiconductor package of claim 16 , wherein the glass substrate is between the first and second ends of the first trench and the third and fourth ends of the second trench.

19. The semiconductor package of claim 16 , including the conductive material in the second opening to provide a second signal path, and including the conductive material in the second trench to provide electromagnetic shielding for the second signal path.

20. The semiconductor package of claim 9 , wherein the first trench has a c-shape.