IP Library Granted Patent US 11,799,485
Granted Patent B2
US 11,799,485 · App. 17/485,373 · Granted Oct 24, 2023

Techniques for reducing uneven aging in integrated circuits

Inventor: Herman Schmit (Palo Alto, CA)
Assignee: Intel Corporation
H03K19/17764G06F30/34H03K19/1776H03K19/17744H03K19/17752G06F2119/04H03K3/0315H03K19/17736
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Quick Facts
Patent No.
US 11,799,485
App. No.
17/485,373
Granted
Oct 24, 2023
Kind
B2
Abstract

A programmable integrated circuit includes configuration circuitry configured to receive configurations of a user design for the programmable integrated circuit. Each of the configurations implements the user design using at least some unique circuitry in the programmable integrated circuit relative to the other ones of the configurations. The configuration circuitry is further configured to implement the user design in a first one of the configurations. The configuration circuitry is further configured to move the user design from the first one of the configurations to a second one of the configurations to cause effects of aging processes in circuits in the programmable integrated circuit that are not aged by the first one of the configurations.

Claims (40)

1. A computer readable non-transitory medium storing executable instructions for reducing uneven aging in a programmable integrated circuit, the executable instructions comprising:

instructions executable by a design tool to generate configurations of a user design for the programmable integrated circuit, wherein each of the configurations implements the user design using at least some unique circuitry in the programmable integrated circuit relative to the other ones of the configurations;

instructions executable by the design tool to direct configuration circuitry in the programmable integrated circuit to implement the user design in a first one of the configurations; and

instructions executable by the design tool to direct the configuration circuitry to move the user design from the first one of the configurations to a second one of the configurations to cause effects of aging processes in circuits in the programmable integrated circuit that are not aged by the first one of the configurations.

2. The computer readable non-transitory medium of claim 1 further comprising:

instructions executable by the design tool to direct the configuration circuitry to move the user design from the second one of the configurations back to the first one of the configurations.

3. The computer readable non-transitory medium of claim 1 further comprising:

instructions executable by the design tool to direct the configuration circuitry to move the user design from the second one of the configurations to a third one of the configurations to cause effects of the aging processes in circuits that are not aged by the first and second ones of the configurations.

4. The computer readable non-transitory medium of claim 3 further comprising:

instructions executable by the design tool to direct the configuration circuitry to move the user design from the third one of the configurations back to the first one of the configurations.

5. The computer readable non-transitory medium of claim 1 , wherein the instructions executable by the design tool to direct the configuration circuitry to implement the user design in the first one of the configurations further comprises instructions executable by the design tool to direct the configuration circuitry to configure first programmable circuit blocks in the programmable integrated circuit to implement the first one of the configurations, and

wherein the instructions executable by the design tool to direct the configuration wherein the instructions executable by the design tool to direct the configuration circuitry to move the user design from the first one of the configurations to the second one of the configurations further comprises instructions executable by the design tool to direct the configuration circuitry to configure second programmable circuit blocks in the programmable integrated circuit to implement the second one of the configurations, wherein at least some of the second programmable circuit blocks are different than the first programmable circuit blocks.

6. The computer readable non-transitory medium of claim 1 , wherein the instructions executable by the design tool to direct the configuration circuitry to implement the user design in the first one of the configurations further comprises instructions executable by the design tool to direct the configuration circuitry to place the first one of the configurations in first circuits in a subset of programmable logic circuit blocks in the programmable integrated circuit, and

wherein the instructions executable by the design tool to direct the configuration circuitry to move the user design from the first one of the configurations to the second one of the configurations further comprises instructions executable by the design tool to direct the wherein the instructions executable by the design tool to direct the configuration circuitry to move the user design from the first one of the configurations to the second one of the configurations further comprises instructions executable by the design tool to direct the configuration circuitry to place the second one of the configurations in second circuits in the subset of the programmable logic circuit blocks, wherein the second circuits are different than the first circuits.

7. The computer readable non-transitory medium of claim 1 , wherein the instructions executable by the design tool to direct the configuration circuitry to move the user design from the first one of the configurations to the second one of the configurations further comprises instructions executable by the design tool to direct the configuration circuitry to partially reconfigure a part of the user design such that a first portion of the second one of the configurations is implemented by the same circuits as a first portion of the first one of the configurations and a second portion of the second one of the configurations is implemented by different circuits than a second portion of the first one of the configurations.

8. A method for reducing uneven aging in a programmable integrated circuit, the method comprising:

receiving configurations of a user design for the programmable integrated circuit from a design tool, wherein each of the configurations implements the user design with at least some unique circuitry in the programmable integrated circuit relative to the other ones of the configurations;

implementing the user design in a first one of the configurations with configuration circuitry in the programmable integrated circuit; and

moving the user design from the first one of the configurations to a second one of the configurations with the configuration circuitry to cause aging processes in circuitry that is not aged by the first one of the configurations.

9. The method of claim 8 further comprising:

moving the user design from the second one of the configurations back to the first one of the configurations with the configuration circuitry.

10. The method of claim 8 further comprising:

moving the user design from the second one of the configurations to a third one of the configurations with the configuration circuitry to cause the aging processes in circuitry that is not aged by the first and second ones of the configurations.

11. The method of claim 10 further comprising:

moving the user design from the third one of the configurations back to the first one of the configurations with the configuration circuitry.

12. The method of claim 8 , wherein implementing the user design in the first one of the configurations further comprises configuring first circuit blocks in the programmable integrated circuit with the configuration circuitry to implement the first one of the configurations of the user design, and

wherein moving the user design from the first one of the configurations to the second one of the configurations further comprises configuring second circuit blocks in the programmable integrated circuit with the configuration circuitry to implement the second one of the configurations of the user design, wherein at least some of the second circuit blocks are different than the first circuit blocks.

13. The method of claim 8 , wherein moving the user design from the first one of the configurations to the second one of the configurations further comprises partially reconfiguring a part of the user design with the configuration circuitry such that a first portion of the second one of the configurations is implemented by the same circuits as a first portion of the first one of the configurations and a second portion of the second one of the configurations is implemented by different circuits than a second portion of the first one of the configurations.

14. The method of claim 8 , wherein implementing the user design in the first one of the configurations further comprises placing the first one of the configurations in first circuits in a subset of programmable logic circuit blocks in the programmable integrated circuit using the configuration circuitry, and

wherein moving the user design from the first one of the configurations to the second one of the configurations further comprises placing the second one of the configurations in second circuits in the subset of the programmable logic circuit blocks using the configuration circuitry, wherein the second circuits are different than the first circuits.

15. A programmable integrated circuit comprising:

configuration circuitry configured to receive configurations of a user design for the programmable integrated circuit, wherein each of the configurations implements the user design using at least some unique circuitry in the programmable integrated circuit relative to the other ones of the configurations,

wherein the configuration circuitry is further configured to implement the user design in a first one of the configurations, and wherein the configuration circuitry is further configured to move the user design from the first one of the configurations to a second one of the configurations to cause effects of aging processes in circuits in the programmable integrated circuit that are not aged by the first one of the configurations.

16. The programmable integrated circuit of claim 15 , wherein the configuration circuitry is further configured to move the user design from the second one of the configurations back to the first one of the configurations.

17. The programmable integrated circuit of claim 15 , wherein the configuration circuitry is further configured to move the user design from the second one of the configurations to a third one of the configurations to cause effects of the aging processes in circuits that are not aged by the first and second ones of the configurations.

18. The programmable integrated circuit of claim 17 , wherein the configuration circuitry is further configured to move the user design from the third one of the configurations back to the first one of the configurations.

19. The programmable integrated circuit of claim 15 , wherein the configuration circuitry is further configured to configure first programmable circuit blocks in the programmable integrated circuit to implement the first one of the configurations, and

wherein the configuration circuitry is further configured to configure second programmable circuit blocks in the programmable integrated circuit to implement the second one of the configurations, wherein at least some of the second programmable circuit blocks are different than the first programmable circuit blocks.

20. The programmable integrated circuit of claim 15 , wherein the configuration circuitry is further configured to place the first one of the configurations in first circuits in a subset of programmable logic circuit blocks in the programmable integrated circuit, and

wherein the configuration circuitry is further configured to place the second one of the configurations in second circuits in the subset of the programmable logic circuit blocks, wherein the second circuits are different than the first circuits.

Assignments (2)
SECURITY INTEREST Recorded Sep 12, 2025
From: ALTERA CORPORATION
To: BARCLAYS BANK PLC, AS COLLATERAL AGENT
Reel/Frame 073431/0309 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2024
From: INTEL CORPORATION
To: ALTERA CORPORATION
Reel/Frame 066353/0886 →