IP Library › Granted Patent US 12,445,330
Granted Patent B2
US 12,445,330 · App. 17/503,085 · Granted Oct 14, 2025

High-speed signaling systems with adaptable pre-emphasis and equalization

Inventors: Jared L. Zerbe (Woodside, CA); Fred F. Chen (San Francisco, CA); Andrew Ho (San Jose, CA); Ramin Farjad-Rad (Los Altos, CA); John W. Poulton (Chapel Hill, NC); Kevin S. Donnelly (Los Altos, CA); Brian S. Leibowitz (San Francisco, CA); Vladimir Stojanovic (Berkeley, CA)
Assignee: Rambus Inc.
H04L27/01H04L1/0026H04L7/0337H04L25/03057H04L25/03343H04L25/03885H04L25/497H04W52/20H04L7/0025H04L7/0087H04L25/0272H04L25/028H04L2025/03503H04W52/225Y02D30/70
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,445,330
App. No.
17/503,085
Granted
Oct 14, 2025
Kind
B2
Abstract

A signaling system includes a pre-emphasizing transmitter and an equalizing receiver coupled to one another via a high-speed signal path. The receiver measures the quality of data conveyed from the transmitter. A controller uses this information and other information to adaptively establish appropriate transmit pre-emphasis and receive equalization settings, e.g. to select the lowest power setting for which the signaling system provides some minimum communication bandwidth without exceeding a desired bit-error rate.

Claims (49)

1. A method of operating a first integrated circuit (IC), comprising:

transmitting, from the first IC to a second IC that is separate from the first IC, a digital bitstream;

receiving, at the first IC, a setting from the second IC based on an updated setting of a decision feedback equalizer (DFE) of the second IC, the updated setting generated by a control circuit on the second IC; and

wherein the updated setting is based on a measure of quality of the digital bit stream as received by the second IC.

2. The method according to claim 1 , wherein the updated setting comprises:

an updated DFE setting for the DFE, and an updated filter setting for a filter.

3. The method according to claim 2 , wherein the updated filter setting comprises:

an updated finite impulse response (FIR) filter setting.

4. The method according to claim 2 , wherein:

the updated DFE setting enables the DFE while the updated filter setting disables the filter, or

the updated DFE setting disables the DFE while the updated filter setting enables the filter.

5. The method according to claim 1 , wherein the receiving of the setting from the second IC comprises:

receiving a single command from the second IC.

6. The method according to claim 5 , wherein the receiving of the single command comprises:

receiving a mode signal indicating a selection of an operating mode.

7. The method according to claim 1 , wherein the measure of quality comprises:

a bit error rate (BER).

8. A first integrated circuit (IC), comprising:

transmit circuitry to transmit, from the first IC to a second IC that is separate from the first IC, a digital bit stream;

receiver circuitry disposed on the first IC to receive a setting from the second IC based on an updated setting of a decision feedback equalizer (DFE) of the second IC, the setting generated by a control circuit on the second IC; and

wherein the updated setting is based on a measure of quality of the digital bit stream as received by the second IC.

9. The first IC of claim 8 , wherein:

the updated setting comprises an updated DFE setting for the DFE of the second IC, and an updated filter setting for a filter of the second IC.

10. The first IC of claim 9 , wherein:

the updated DFE setting enables the DFE of the second IC while the updated filter setting disables the filter of the second IC, or

the updated DFE setting disables the DFE of the second IC while the updated filter setting enables the filter of the second IC.

11. The first IC of claim 9 , wherein the filter of the second IC comprises:

a finite impulse response (FIR) filter.

12. The first IC of claim 8 , wherein:

the measure of quality comprises a bit error rate (BER).

13. The first IC of claim 8 , wherein:

the receiver circuitry receives the determined setting as a single command from the second IC.

14. The first IC of claim 13 , wherein:

the receiver circuitry receives the single command from the second IC as a mode signal representing a selection of an operating mode.

15. A first integrated circuit (IC) chip, comprising:

a transmitter to transmit, from the first IC chip to a second IC chip that is separate from the first IC chip, a digital bit stream;

a receiver disposed on the first IC chip to receive a setting from the second IC chip based on an updated setting of an equalizer of the second IC chip, the updated setting generated by a control circuit on the second IC chip; and

wherein the updated setting is based on a measure of quality of the digital bit stream as received by the second IC chip.

16. The first IC chip of claim 15 , wherein:

the updated setting comprises an updated equalizer setting for the equalizer of the second IC chip, and an updated filter setting for a filter of the second IC chip.

17. The first IC chip of claim 16 , wherein:

the updated equalizer setting enables the equalizer of the second IC chip while the updated filter setting disables the filter of the second IC chip, or

the updated equalizer setting disables the equalizer of the second IC chip while the updated filter setting enables the filter of the second IC chip.

18. The first IC chip of claim 16 , wherein the filter of the second IC chip comprises:

a finite impulse response (FIR) filter.

19. The first IC chip of claim 15 , wherein:

the measure of quality comprises a bit error rate (BER).

20. The first IC chip of claim 15 , wherein:

the receiver receives the setting as a single command from the second IC chip.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2025
From: RAMBUS INC.
To: SIGNAL LLP
Reel/Frame 073085/0650 →
Continuity (8)
Continuation 16256882 · Jan 24, 2019
Continuation 16010445 · Jun 16, 2018
Continuation 15652059 · Jul 17, 2017
Continuation 13896224 · May 16, 2013
Continuation 11336045 · Jan 20, 2006
Provisional Application 60686754 · Jun 1, 2005
Provisional Application 60645823 · Jan 20, 2005
Related Publication 20220103405A1 · Mar 31, 2022
References Cited (169)
US 3806807A · Nakamura · 1974 [cited by applicant]
US 4187479A · Ishizuka et al. · 1980 [cited by applicant]
US 4459698A · Yumoto et al. · 1984 [cited by applicant]
US 4639681A · Hasegawa · 1987 [cited by applicant]
US 4985900A · Rhind et al. · 1991 [cited by applicant]
US 5097482A · Serizawa et al. · 1992 [cited by applicant]
US 5267265A · Mizoguchi · 1993 [cited by examiner]
US 5293405A · Gersbach et al. · 1994 [cited by applicant]
US 5402012A · Thomas · 1995 [cited by applicant]
US 5654986A · Lim · 1997 [cited by applicant]
US 5668833A · Kurokami · 1997 [cited by examiner]
US 5682112A · Fukushima · 1997 [cited by applicant]
US 5764695A · Nagaraj et al. · 1998 [cited by applicant]
US 5844431A · Chen · 1998 [cited by applicant]
US 5991339A · Bazes et al. · 1999 [cited by applicant]
US 5999056A · Fong · 1999 [cited by applicant]
US 6028901A · Huynh et al. · 2000 [cited by applicant]
US 6137839A · Mannering et al. · 2000 [cited by applicant]
US 6192071B1 · Hirth et al. · 2001 [cited by applicant]
US 6222592B1 · Patel · 2001 [cited by applicant]
US 6225795B1 · Stratakos et al. · 2001 [cited by applicant]
US 6265911B1 · Nairn · 2001 [cited by applicant]
US 6266379B1 · Dally · 2001 [cited by applicant]
US 6329874B1 · Ye et al. · 2001 [cited by applicant]
US 6429692B1 · Chan et al. · 2002 [cited by applicant]
US 6496911B1 · Dixon et al. · 2002 [cited by applicant]
US 6542555B2 · Dally · 2003 [cited by applicant]
US 6570916B1 · Feldbaumer et al. · 2003 [cited by applicant]
US 6624688B2 · Jaussi et al. · 2003 [cited by applicant]
US 6680681B1 · Hsu et al. · 2004 [cited by applicant]
US 6687841B1 · Marukawa · 2004 [cited by applicant]
US 6731683B1 · Fiedler et al. · 2004 [cited by applicant]
US 6741644B1 · Dehghan et al. · 2004 [cited by applicant]
US 6751255B1 · Reuven · 2004 [cited by applicant]
US 6792049B1 · Bao et al. · 2004 [cited by applicant]
US 6812872B1 · Lu · 2004 [cited by applicant]
US 6862296B1 · Desai · 2005 [cited by applicant]
US 6992855B2 · Ehrlich · 2006 [cited by applicant]
US 7030657B2 · Stojanovic et al. · 2006 [cited by applicant]
US 7092472B2 · Stojanovic · 2006 [cited by applicant]
US 7099404B2 · Dally · 2006 [cited by applicant]
US 7126378B2 · Stojanovic et al. · 2006 [cited by applicant]
US 7176721B2 · Ho et al. · 2007 [cited by applicant]
US 7199615B2 · Stojanovic et al. · 2007 [cited by applicant]
US 7233164B2 · Stojanovic et al. · 2007 [cited by applicant]
US 7286597B2 · Buchwald et al. · 2007 [cited by applicant]
US 7339988B1 · Shanbhag et al. · 2008 [cited by applicant]
US 7397848B2 · Stojanovic et al. · 2008 [cited by applicant]
US 7400675B2 · Moughabghab et al. · 2008 [cited by applicant]
US 7411840B2 · Gaskins et al. · 2008 [cited by applicant]
US 7443910B2 · Agazzi · 2008 [cited by applicant]
US 7446622B2 · Chiang · 2008 [cited by applicant]
US 7496161B2 · Chou et al. · 2009 [cited by applicant]
US 7535980B2 · Yang et al. · 2009 [cited by applicant]
US 7574146B2 · Chiang · 2009 [cited by examiner]
US 7715471B2 · Werner et al. · 2010 [cited by applicant]
US 20010022813A1 · Tan et al. · 2001 [cited by applicant]
US 20010024477A1 · Haycock · 2001 [cited by applicant]
US 20010055335A1 · Agazzi et al. · 2001 [cited by applicant]
US 20020009167A1 · Farjad-Rad · 2002 [cited by applicant]
US 20020061012A1 · Thi et al. · 2002 [cited by applicant]
US 20020094043A1 · Chu et al. · 2002 [cited by applicant]
US 20030035495A1 · Laamanen et al. · 2003 [cited by applicant]
US 20030123572A1 · Samueli et al. · 2003 [cited by applicant]
US 20030161421A1 · Schmidt et al. · 2003 [cited by applicant]
US 20030165191A1 · Kokuryo et al. · 2003 [cited by applicant]
US 20030223489A1 · Smee et al. · 2003 [cited by applicant]
US 20030223505A1 · Verbin · 2003 [cited by examiner]
US 20040005001A1 · Jones et al. · 2004 [cited by applicant]
US 20040008059A1 · Chen et al. · 2004 [cited by applicant]
US 20040022311A1 · Zerbe et al. · 2004 [cited by applicant]
US 20040037374A1 · Gonikberg · 2004 [cited by applicant]
US 20040052309A1 · Li · 2004 [cited by applicant]
US 20040057513A1 · Schenk · 2004 [cited by applicant]
US 20040091028A1 · Aronson et al. · 2004 [cited by applicant]
US 20040190661A1 · Vrazel · 2004 [cited by applicant]
US 20040203559A1 · Stojanovic et al. · 2004 [cited by applicant]
US 20040209635A1 · Hsu et al. · 2004 [cited by applicant]
US 20050047500A1 · Gupta et al. · 2005 [cited by applicant]
US 20050141661A1 · Renaud · 2005 [cited by examiner]
US 20050201454A1 · Chaudhuri et al. · 2005 [cited by applicant]
US 20050201491A1 · Wei · 2005 [cited by applicant]
US 20050281355A1 · Cranford et al. · 2005 [cited by applicant]
US 20060002462A1 · Park · 2006 [cited by applicant]
US 20060008279A1 · Chiang et al. · 2006 [cited by applicant]
US 20060093028A1 · Balan · 2006 [cited by examiner]
US 20060146927A1 · Samueli et al. · 2006 [cited by applicant]
US 20070147559A1 · Lapointe · 2007 [cited by applicant]
US 20080048730A1 · Bae · 2008 [cited by applicant]
US 20080107165A1 · Nicolescu et al. · 2008 [cited by applicant]
US 20080198915A1 · Gorecki · 2008 [cited by applicant]
US 20080247452A1 · Lee · 2008 [cited by applicant]
US 20080260016A1 · Lapointe et al. · 2008 [cited by applicant]
US 20100008414A1 · Lee et al. · 2010 [cited by applicant]
US 20100027606A1 · Dai et al. · 2010 [cited by applicant]
WO WO03028234A1 · 2003 [cited by examiner]
WO WO2005022750 · 2005 [cited by applicant]
Baker, Alan J., “An Adaptive Cable Equalizer for Serial Digital Video Rates to 400Mb/s,” 1996 IEEE International Solid-State Circuits Conference, Session 10, Low-Power & Communication Signal Processing, Paper FA 10.7. 3… [cited by applicant]
Bisdounis, Labros, et al., “European Low-Power Initiative for Electronic System Design.” Design CMOS Circuits for Low Power. Copyright 2002, Kluwer Academic Publishers. Pgs. Cover, Copyright, and 71-96. 28 pages. [cited by applicant]
Chen et al., “A 1.25Gb/s, 460mW CMOS Transceiver for Serial Data Communication,” ISSCC97, Session 15, Serial Data Communications, Paper FP 15.3, pp. 242-243, 465, Feb. 7, 1997. 3 pages. [cited by applicant]
Choi et al., “A Cmos 3.5Gbps Continuous-Time Adaptive Cable Equalizer with Joint Adaptation Method of Low-Frequency Gain and High-Frequency Boosting,” 2003 Symposium on VLSI Circuits Digest of Technical Paper. 4 pages. [cited by applicant]
Ciric, Jovanka et al., “Delay Minimization and Technology Mapping of Two-Level Structures and Implementation Using Clock-Delayed Domino Logic.” Dept. of Electrical Engineering, University of Washington, 2000. 6 pages. [cited by applicant]
Communication Pursuant to Article 94(3) EPC with Mail Date Mar. 31, 2020 re: EP Appln. No. 18195857.0. 7 Pages. [cited by applicant]
Dally et al., “Transmitter Equalization for 4-Gbps Signaling,” IEEE Micro, vol. 17, No. 1, Jan./Feb. 1997, pp. 48-56. 9 pages. [cited by applicant]
Dessent, Brian, “Fully Dynamic Logic Blocks Using Multiple-Phase Clocks.” EE241, Spring 2001, UC Berkeley. 11 Pages. [cited by applicant]
EP Examination Report dated Dec. 19, 2014 in EP Application No. 11170386.4. 6 pages. [cited by applicant]
EP Examination Report dated Dec. 19, 2014 in EP Application No. 11170420.1. 7 pages. [cited by applicant]
EP Examination Report dated Dec. 19, 2014 in EP Application No. 11170426.8. 7 pages. [cited by applicant]
EP Examination Report dated Mar. 18, 2015 re Appln. No. 11170405.2. 8 pages. [cited by applicant]
EP Examination Report dated Mar. 18, 2015 re Appln. No. 11170438.3. 7 pages. [cited by applicant]
EP Extended European Search Report With Mail Date Mar. 6, 2019 re: EP Appl. No. 18195857.0. 12 Pages. [cited by applicant]
EP Extended Search Report dated Aug. 16, 2011 for EP Application No. 11170420.1 6 Pages. [cited by applicant]
EP Extended Search Report dated Sep. 13, 2011 re EP Application No. 11170405.2. 6 Pages. [cited by applicant]
EP Extended Search Report dated Sep. 14, 2011 re EP Application No. 11170438.3. 8 Pages. [cited by applicant]
EP Extended Search Report dated Sep. 30, 2011 re EP Application No. 11170386.4. 8 Pages. [cited by applicant]
EP Office Communication dated Nov. 14, 2012 re EP Application No. 06718942.3. 7 Pages. [cited by applicant]
EP Response dated Apr. 13, 2012 re EP Application No. 11170386.4, include new claims (highlighted amendments and clear copy) and new description pp. 16 pages. [cited by applicant]
EP Response dated Apr. 13, 2012 re EP Application No. 11170426.8, includes new claims (highlighted and clear copy) and new description p. 24 pages. [cited by applicant]
EP Response dated Apr. 3, 2012 re EP Application No. 11170438.3, includes new claims (highlighted and clear copy) and new description pp. 17 pages. [cited by applicant]
EP Response dated Jul. 10, 2015 in EP Application No. 11170438.3, Includes New Claims and New Description Pages (Highlighted and Clear copies for each). 24 pages. [cited by applicant]
EP Response dated Jul. 6, 2015 in EP Application No. 11170405.2, Includes New Claims and New Description Pages (Highlighted and Clear copies for each). 26 pages. [cited by applicant]
EP Response dated Jun. 24, 2015 in EP Application No. 11170426.8, Includes New Claims and New Description Pages (Highlighted and Clear Copies). 39 pages. [cited by applicant]
EP Response dated Jun. 26, 2015 in EP Application No. 11170386.4, Includes New Claims (Highlighted and Clear copies). 12 pages. [cited by applicant]
EP Response dated Jun. 26, 2015 in EP Application No. 11170420.1, Includes New Claims (Highlighted and Clear copies). 11 pages. [cited by applicant]
EP Response dated Mar. 21, 2012 to the Official Communication of Aug. 16, 2011 re EP Application No. 11170420.1, includes new claims (highlighted and clear copy) and new description p. 17 pages. [cited by applicant]
EP Response dated May 24, 2013 re EP Application No. 06718942.3 including new claims (highlighted amendments and clear copy) with new description p. 35 Pages. [cited by applicant]
EP Response to the Official Communication of Sep. 13, 2011, dated Apr. 2, 2012 in EP Application No. 11 170 405.2. 17 pages. [cited by applicant]
EP Voluntary Amendment dated Jun. 3, 2011 re EP Application No. 06718942.3. 9 Pages. [cited by applicant]
Farjad-Rad et al., “0.622-8 Gbps 150mW Serial IO Macrocell with Fully Flexible Preemphasis and Equalization,” Symposium on VLSI Circuits Digest of Technical Papers, Jun. 2003. 4 pages. [cited by applicant]
Granberg, Tom, “Handbook of Digital Techniques for High-Speed Design,” Prentice Hall Modern Semiconductor Design Series, Copyright 2004 by Pearson Education, Inc. 12 pages. [cited by applicant]
Kudoh, Yoshiharu, “A 0.13—um CMOS 5-GB/s 10-m 28 AWG Cable Transceiver with No-Feedback-Loop Continuous-Time Post-Equalizer,” IEEE Journal of Solid-State Circuits, vol. 38, No. 5, May 2003. 6 pages. [cited by applicant]
Laakso, Timo I (Prof.) “Lecture 4—Optimal Linear Equalizers for Linear Channels 1.” S-38.411 Signal Processing in Telecommunications I, Spring 2000, 12 pages. [cited by applicant]
Laakso, Timo | (Prof.) “Lecture 5—Optimal Linear Equalizers for Linear Channels 2.” S-38.4111 Signal Processing in Telecommunications I, Spring 2000. 14 pages. [cited by applicant]
Laakso, Timo I (Prof.) “Lecture 7—Adaptive equalizers 2.” S-38.411 Signal Processing in Telecommunications I, Spring 2000, 12 pages. [cited by applicant]
Laakso, Timo I (Prof.) “Lecture 8—Nonlinear receivers 1: DFE equalizers.” S-38.411 Signal Processing in Telecommunications I, Spring 2000, 13 pages. [cited by applicant]
Laakso, Timo I., “Lecture 6: Adaptive equalizers 1,” S-38.411 Signal Processing in Telecommunications 1, Spring 2000, 10 pages. [cited by applicant]
Landman, Paul et al. “A Transmit Architecture with 4-Tap Feedforward Equalization for 6.25/12.5Gb/s Serial Backplane Communications.” 2005 IEEE International Solid-State Circuits Conference. pp. 40-41 and 508. [cited by applicant]
Landman, Paul et al., “A Transmit Architecture with a 4-Tap Feedforward Equalization for 6.25/12.5Gb/s Serial Backplane Communications.” 2005 IEEE International Solid-State Circuits Conference, Session 3, Backplane Tran… [cited by applicant]
Madduri, Vansanta, “High Speed Backplanes in Communications Systems.” Mar. 2004. 7 pages. [cited by applicant]
Mahmoodi-Meimand, Hamid, “Diode-Footed Domino: A Leakage-Tolerant High Fan-in Dynamic Circuit Design Style.” IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 51, No. 3, Mar. 2004, 9 Pages. [cited by applicant]
PCI-SIG, “PCI Express Base Specification,” Revision 1.0, Apr. 29, 2002. 416 pages. [cited by applicant]
Roth, Dr. Ze'ev, “Jitter and Cross-talk Effects Using Infiniband Cables and their Implication on Equalization Techniques,” Mysticom slides, Dec. 2002. 38 pages. [cited by applicant]
Serial ATA Workgroup, “Serial ATA: High Speed Serialized AT Attachment,” Revsion 1.0a, Jan. 7, 2003. 311 pages. [cited by applicant]
Serial ATA, “Serial ATA II: Electrical Specification,” Revision 1.0, May 26, 2004. 187 pages. [cited by applicant]
Shakiba, Mohammad Hossein, “A 2.5Gb/s Adaptive Cable Equalizer,” 1999 IEEE International Solid-State Circuits Conference, Session 23, Paper WP 23.3. 2 pages. [cited by applicant]
Sirisantana, Naran et al., “A Time Borrowing Selectively Clocked Skewed Logic for High-Performance Circuits in Scaled Technologies.” School of Electrical and Computer Engineering, Purdue Univ. 2003. 4 pages. [cited by applicant]
Stojanovic et al., “Adaptive Equalization and Data Recovery in a Dual-Mode (PAM2/4) Serial Link Transceiver,” Rambus, Inc., Department of Electrical Engineering, Stanford University, Jan. 2004. 4 pages. [cited by applicant]
Stojanovic, Vladimir et al. “Transmit Pre-Emphasis for High-Speed Time-Division-Multiplexed Serial Link Transceiver.” Submitted to IEEE Symposium on VLSI Circuits, Jun. 2004. 17 pages. [cited by applicant]
Widmer et al., “Single-Chip 4 x 500-MBd CMOS Transceiver,” IEEE Journal of Solid-State Circuits, vol. 31, No. 12, Dec. 1996, pp. 2004-2014. 11 pages. [cited by applicant]
Zerbe et al., “Equalization and Clock Recovery for a 2.5—10 GB/s 2-PAM/4-PAM Backplane Transceiver Cell,” Presented at ISSCC 2003, Session 4, Clock Recovery and Backplane Transceivers, Paper 4.6. 10 pages. [cited by applicant]
Zerbe, Jared et al., “Equalization and Clock Recovery for a 2.5-10-GB/s 2-PAM/4-PAM Backplane Transceiver Cell.” IEEE Journal of Solid-State Circuits, vol. 38, No. 12, Dec. 2003. 10 Pages. [cited by applicant]
Zerbe, Jared, U.S. Appl. No. 11/336,045, filed Jan. 20, 2006, re Supplemental Amendment dated Aug. 3, 2010. 23 pages. [cited by applicant]
Zerbe, Jared, U.S. Appl. No. 11/336,045, filed Jan. 20, 2006, Final Office Action dated Sep. 14, 2011. 5 Pages. [cited by applicant]
Zerbe, Jared, U.S. Appl. No. 11/336,045, filed Jan. 20, 2006, Final Office Action mailed Aug. 4, 2009. 15 pages. [cited by applicant]
Zerbe, Jared, U.S. Appl. No. 11/336,045, filed Jan. 20, 2006, Final Office Action with mail date Oct. 12, 2010. 16 Pages. [cited by applicant]
Zerbe, Jared, U.S. Appl. No. 11/336,045, filed Jan. 20, 2006, Office Action mailed Mar. 15, 2012. 8 pages. [cited by applicant]
Zerbe, Jared, U.S. Appl. No. 11/336,045, filed Jan. 20, 2006, Office Action with mail date of Apr. 13, 2011. 4 Pages. [cited by applicant]
Zerbe, Jared, U.S. Appl. No. 11/336,045, filed Jan. 20, 2006, Office Action with mail date of Dec. 20, 2010, includes Notice of References Cited. 9 Pages. [cited by applicant]
Zerbe, Jared, U.S. Appl. No. 11/336,045, filed Jan. 20, 2006, Office Action with mail date of Mar. 17, 2010 includes IDS. 18 Pages. [cited by applicant]
Zerbe, Jared, U.S. Appl. No. 11/336,045, filed Jan. 20, 2006, Response dated Oct. 28, 2010 to the Office Action dated Oct. 12, 2010. 12 pages. [cited by applicant]
Zerbe, Jared, U.S. Appl. No. 11/336,045, filed Jan. 20, 2006, Response dated Feb. 1, 2011 to the Office Action of Dec. 20, 2010. 10 Pages. [cited by applicant]
Zerbe, Jared, U.S. Appl. No. 11/336,045, filed Jan. 20, 2006, Response submitted Jun. 28, 2011 to the Office Action of Apr. 13, 2011. 9 Pages. [cited by applicant]
Zerbe, Jared, U.S. Appl. No. 11/336,045, filed Jan. 20, 2006, Response to Final Office Action of Nov. 17, 2011, submitted Jan. 6, 2012. 9 pages. [cited by applicant]
Zerbe, Jared, U.S. Appl. No. 11/336,045, filed Jan. 20, 2006, Second Response dated Nov. 22, 2010 to the Final Office and additionally Responsive to Advisory Action of Nov. 9, 2010. 12 Pages. [cited by applicant]
Zerbe, Jared, U.S. Appl. No. 13/215,951, filed Aug. 23, 2011, Office Action mailed Mar. 2, 2012. 9 pages. [cited by applicant]
Zerbe, Jared, U.S. Appl. No. 13/216,047, filed Aug. 23, 2011, re Office Action dated Dec. 23, 2011. 10 pages. [cited by applicant]
Zerbe, Jared, U.S. Appl. No. 13/284,002, filed Oct. 28, 2011, Office Action dated Apr. 26, 2012. 12 pages. [cited by applicant]
Zhang, Johnny et al. “White Paper on Transmit Pre-Emphasis and Receive Equalization.” Oct. 31, 2002. 8 pages. [cited by applicant]
EP Response Filed on Jan. 24, 2022 In Response to the Official Communication Pursuant to Article 94(3) EPC dated Jul. 15, 2021. 14 pages. [cited by applicant]