Semiconductor package having die pad with cooling fins
Embodiments of the present disclosure are directed to leadframe semiconductor packages having die pads with cooling fins. In at least one embodiment, the leadframe semiconductor package includes leads and a semiconductor die (or chip) coupled to a die pad with cooling fins. The cooling fins are defined by recesses formed in the die pad. The recesses extend into the die pad at a bottom surface of the semiconductor package, such that the bottom surfaces of the cooling fins of the die pad are flush or coplanar with a surface of the package body, such as an encapsulation material. Furthermore, bottom surfaces of the cooling fins of the die pad are flush or coplanar with exposed bottom surfaces of the leads.
1. A method, comprising:
forming at least one recess in a first surface of a die pad to form a cooling fin;
coupling a semiconductor die to a second surface of the die pad;
electrically coupling the semiconductor die to a plurality of leads; and
encapsulating the semiconductor die, the die pad, and the plurality of leads in a packaging material to form a semiconductor package, encapsulating the semiconductor die in the packaging material includes:
forming a first outer surface of the packaging material coplanar with third surfaces of the plurality of leads and coplanar with the first surface of the die pad; and
forming a second outer surface of the packaging material coplanar with fourth surfaces of the plurality of leads opposite to the third surfaces of the plurality of leads; and
fully exposing sidewalls of the plurality of leads from the packaging material that extend from the third surfaces of the plurality of leads to the fourth surfaces of the plurality of leads.
2. The method of claim 1 , wherein forming the at least one recess comprises forming a plurality of recesses in the first surface of the die pad to form a plurality of cooling fins.
3. The method of claim 2 , wherein the step of forming the plurality of recesses occurs after the step of encapsulating the semiconductor die in the packaging material.
4. The method of claim 2 , wherein forming the plurality of recesses comprises etching to at least 50% of a thickness of the die pad to form the plurality of cooling fins.
5. The method of claim 2 , wherein the plurality of recesses are arranged in columns to form a plurality of cooling fins arranged in columns that alternate with the plurality of recesses.
6. The method of claim 2 , further comprising coupling the semiconductor package to a PCB, wherein the plurality of cooling fins face away from the PCB.
7. A method, comprising:
coupling a semiconductor die to a first surface of a die pad, the first surface being opposite a second surface of the die pad;
electrically coupling the semiconductor die to a plurality of leads;
encapsulating the semiconductor die, the die pad, and the plurality of leads in a packaging material and forming a third surface of the packaging material coplanar with the second surface of the die pad; and
after forming the packaging material, forming a plurality of recesses in the second surface of the die pad coplanar with the third surface of the packaging material forming a plurality of cooling fins in the die pad, wherein the plurality of cooling fins alternate between respective pairs of the plurality of recesses.
8. The method of claim 7 , wherein the plurality of recesses and the plurality of cooling fins extend across the second surface of the die pad from a first side surface to a second side surface, the second side surface being opposite the first side surface.
9. The method of claim 7 , wherein the cooling fins have a longitudinal length that extends in a direction that is parallel to the second surface of the die pad.
10. The method of claim 7 , wherein forming the plurality of recesses comprises etching to at least 50% of a thickness of the die pad to form the plurality of cooling fins.
11. The method of claim 7 , wherein a width of each of the plurality of recesses and a width of each of the plurality of cooling fins arranged in columns that alternate with the plurality of recesses.
12. The method of claim 7 , further comprising fully exposing sidewalls of the plurality of leads from the packaging material that extend from fourth surfaces of the plurality of leads to fifth surfaces of the plurality of leads opposite to the fourth surfaces of the plurality of leads, and
wherein encapsulating the semiconductor die, the die pad, and the plurality of leads in the packaging material further includes:
forming a first outer surface of the packaging material coplanar with fourth surfaces of the plurality of leads and coplanar with the second surface of the die pad; and
forming a second outer surface of the packaging material coplanar with fifth surfaces of the plurality of leads opposite to the fourth surfaces of the plurality of leads.
13. The method of claim 12 , further comprising coupling the fifth surfaces of the plurality of leads to a PCB, wherein the one or more cooling fins face away from the PCB.
14. A method of forming a semiconductor package, the method comprising:
coupling a semiconductor die to a first surface of a die pad opposite to a second surface of the die pad;
electrically coupling the semiconductor die to a plurality of leads;
encapsulating the semiconductor die, the die pad, and the plurality of leads in a packaging material and forming a third surface of the packaging material coplanar with the second surface of the die pad; and
forming a plurality of recesses in the second surface of the die pad coplanar with the third surface of the packaging material forming one or more cooling fins in the die pad at the second surface of the die pad.
15. The method of claim 14 , wherein the one or more cooling fins is a single cooling fin.
16. The method of claim 15 , wherein the single cooling fin is a spiral shaped cooling fin.
17. The method of claim 16 , wherein the single cooling fin has a radial arrangement.
18. The method of claim 17 , wherein the radial arrangement includes a center portion and a plurality of cooling fins extending from the center portion.
19. The method of claim 14 , further comprising fully exposing sidewalls of the plurality of leads from the packaging material that extend from fourth surfaces of the plurality of leads to fifth surfaces of the plurality of leads opposite to the fourth surfaces of the plurality of leads, and
wherein encapsulating the semiconductor die, the die pad, and the plurality of leads in the packaging material further includes:
forming a first outer surface of the packaging material coplanar with fourth surfaces of the plurality of leads and coplanar with the second surface of the die pad; and
forming a second outer surface of the packaging material coplanar with fifth surfaces of the plurality of leads opposite to the fourth surfaces of the plurality of leads.
20. The method of claim 19 , further comprising coupling the fifth surfaces of the plurality of leads to a PCB, wherein the plurality of cooling fins face away from the PCB.