Method for preparing semiconductor structure having void between bonded wafers

1. A method of manufacturing a semiconductor structure, comprising:

providing a first wafer including a first substrate, a first dielectric layer disposed over the first substrate, and a first component formed within the first dielectric layer;

providing a second wafer including a second substrate, a second dielectric layer disposed over the second substrate, and a second component formed within the second dielectric layer;

removing a first portion of the first dielectric layer to form a first recess;

removing a second portion of the second dielectric layer to form a second recess;

disposing the second wafer over the first wafer to bond the first dielectric layer to the second dielectric layer;

removing a third portion of the second substrate and the second dielectric layer to form a third recess coupled to the second recess; and

disposing a conductive material to fill the first recess, the second recess and the third recess to form a conductive structure.

2. The method of claim 1 , wherein the removal of the first portion of the first dielectric layer includes exposing a portion of the first component through the first dielectric layer.

3. The method of claim 2 , wherein the removal of the second portion of the second dielectric layer includes exposing a portion of the second component through the second dielectric layer.

4. The method of claim 1 , wherein the first recess is aligned with the second recess.

5. The method of claim 1 , wherein a void defined by the first recess and the second recess is formed after the disposing of the second wafer over the first wafer.

6. The method of claim 1 , wherein the removal of the third portion of the second substrate and the second dielectric layer includes removing a first section of the third portion to form a first opening, disposing an isolating layer conformal to the first opening, removing a bottom portion of the isolating layer, and removing a second section of the third portion to form a second opening.

7. The method of claim 1 , wherein the conductive material is disposed by electroplating.

8. The method of claim 1 , wherein the third portion of the second substrate and the second dielectric layer is removed by dry etching or laser drilling.

9. The method of claim 1 , wherein the disposing of the second wafer over the first wafer includes forming a first interface between the first dielectric layer and the second dielectric layer.

10. The method of claim 1 , wherein a second interface between the conductive structure and the first dielectric layer or a third interface between the conductive structure and the second dielectric layer is formed after the disposing of the conductive material.

11. The method of claim 1 , further comprising grinding the second substrate to reduce a thickness of the second wafer prior to the removal of the third portion of the second substrate and the second dielectric layer.

12. The method of claim 1 , wherein the first recess and the second recess are filled with the conductive material after the first dielectric layer is bonded to the second dielectric layer.