Package-on-package assembly with wire bond vias
A microelectronic package includes a substrate having a first surface. A microelectronic element overlies the first surface. Electrically conductive elements are exposed at the first surface of the substrate, at least some of which are electrically connected to the microelectronic element. The package includes wire bonds having bases bonded to respective ones of the conductive elements and ends remote from the substrate and remote from the bases. The ends of the wire bonds are defined on tips of the wire bonds, and the wire bonds define respective first diameters between the bases and the tips thereof. The tips have at least one dimension that is smaller than the respective first diameters of the wire bonds. A dielectric encapsulation layer covers portions of the wire bonds, and unencapsulated portions of the wire bonds are defined by portions of the wire bonds, including the ends, are uncovered by the encapsulation layer.
1. A microelectronic package comprising:
a substrate having a first region and a second region, the substrate also having a first surface and a second surface remote from the first surface;
at least one microelectronic element overlying the first surface within the first region;
electrically conductive elements exposed at the first surface of the substrate within the second region;
wire bonds having bases bonded to the conductive elements, ends remote from the substrate and remote from the bases, and middle portions between the bases and the ends, wherein:
a first end of a first wire bond is laterally displaced from a first base of the first wire bond;
the first end of the first wire bond comprises a substantially straight portion; and
a first middle portion of the first wire bond comprises a bent portion that is bent at an angle to the substantially straight portion; and
a dielectric encapsulation layer extending from the first surface and covering portions of the wire bonds such that covered portions of the wire bonds are separated from one another by the encapsulation layer, the encapsulation layer overlying at least the second region of the substrate, wherein at least some of the ends of the wire bonds are unencapsulated.
2. A microelectronic package of claim 1 , further comprising a second wire bond wherein:
a first end of the second wire bond is laterally displaced from a first base of the second wire bond;
the first end of the second wire bond comprises a second substantially straight portion; and
a first middle portion of the second wire bond comprises a second bent portion that is bent at an angle to the second substantially straight portion.
3. A microelectronic package of claim 2 , wherein the bent portion of the second wire bond is curved in substantially the same direction as the bent portion of the first wire bond.
4. A microelectronic package of claim 2 , wherein a first lateral distance between the first end of the first wire bond and the first base of the first wire bond is substantially similar to a second lateral distance between the first end of the second wire bond and the first base of the second wire bond.
5. A microelectronic package of claim 4 , wherein:
bent portion of the first wire bond is located a first distance from the first surface;
the bent portion of the second wire bond is located a second distance from the first surface; and
the first distance is substantially the same as the second distance.
6. A microelectronic package of claim 2 , wherein the first end of the first wire bond and the first end of the second wire bond are tapered.
7. A microelectronic package of claim 2 , wherein the substantially straight portion and the second substantially straight portion are both substantially perpendicular to the first surface.
8. A microelectronic package of claim 1 , wherein the substantially straight portion is substantially perpendicular to the first surface.