IP Library › Granted Patent US 11,581,440
Granted Patent B2
US 11,581,440 · App. 17/524,838 · Granted Feb 14, 2023

Transistor and semiconductor device

Inventors: Shunpei Yamazaki (Tokyo, JP); Masayuki Sakakura (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/78693H01L27/0688H01L27/092H01L27/1225H01L29/045H01L29/105H01L29/41733H01L29/42384H01L29/78648H01L29/78696H01L21/823807H01L2029/42388
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,581,440
App. No.
17/524,838
Granted
Feb 14, 2023
Kind
B2
Abstract

A transistor with small parasitic capacitance can be provided. A transistor with high frequency characteristics can be provided. A semiconductor device including the transistor can be provided. Provided is a transistor including an oxide semiconductor, a first conductor, a second conductor, a third conductor, a first insulator, and a second insulator. The first conductor has a first region where the first conductor overlaps with the oxide semiconductor with the first insulator positioned therebetween; a second region where the first conductor overlaps with the second conductor with the first and second insulators positioned therebetween; and a third region where the first conductor overlaps with the third conductor with the first and second insulators positioned therebetween. The oxide semiconductor including a fourth region where the oxide semiconductor is in contact with the second conductor; and a fifth region where the oxide semiconductor is in contact with the third conductor.

Claims (45)

1. A semiconductor device comprising a transistor, the transistor comprising:

a first insulating layer;

an oxide semiconductor layer over the first insulating layer;

a second insulating layer over the oxide semiconductor layer, the second insulating layer having an opening;

a gate electrode, a first part of the gate electrode provided in the opening; and

a gate insulating layer provided between the oxide semiconductor layer and the gate electrode,

wherein in a cross section parallel to a channel length direction of the transistor, a width of the opening is smaller than a width of the oxide semiconductor layer,

wherein the first insulating layer comprises a first region overlapped with the oxide semiconductor layer and a second region not overlapped with the oxide semiconductor layer,

wherein a thickness of the first region of the first insulating layer is larger than a thickness of the second region of the first insulating layer,

wherein, in the cross section parallel to a channel width direction of the transistor, the gate electrode has a second part overlapping with the second region of the first insulating layer, and

wherein a bottom surface of the second part of the gate electrode is located below a bottom surface of the oxide semiconductor layer.

2. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer is an island-shaped oxide semiconductor layer.

3. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises In-M-Zn oxide.

4. The semiconductor device according to claim 3 , wherein M is selected from the group consisting of aluminum, gallium, yttrium, and tin.

5. A semiconductor device comprising a transistor, the transistor comprising:

a first insulating layer;

a first oxide semiconductor layer over the first insulating layer;

a second oxide semiconductor layer over the first oxide semiconductor layer;

a second insulating layer over the second oxide semiconductor layer, the second insulating layer comprising an opening;

a gate electrode, a first part of the gate electrode provided in the opening; and

a gate insulating layer located between the second oxide semiconductor layer and the gate electrode,

wherein in a cross section parallel to a channel length direction of the transistor, a width of the opening is smaller than a width of the first oxide semiconductor layer,

wherein the first insulating layer comprises a first region overlapped with the first oxide semiconductor layer and a second region not overlapped with the first oxide semiconductor layer,

wherein a thickness of the first region of the first insulating layer is larger than a thickness of the second region of the first insulating layer,

wherein, in the cross section parallel to a channel width direction of the transistor, the gate electrode has a second part overlapping with the second region of the first insulating layer, and

wherein a bottom surface of the second part of the gate electrode is located below a bottom surface of the first oxide semiconductor layer.

6. The semiconductor device according to claim 5 , wherein the first oxide semiconductor layer is an island-shaped oxide semiconductor layer.

7. The semiconductor device according to claim 5 , wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises In-M-Zn oxide.

8. The semiconductor device according to claim 7 , wherein M is selected from the group consisting of aluminum, gallium, yttrium, and tin.

9. A semiconductor device comprising a transistor, the transistor comprising:

a first insulating layer;

a first oxide semiconductor layer over the first insulating layer;

a second oxide semiconductor layer over the first oxide semiconductor layer;

a second insulating layer over the second oxide semiconductor layer, the second insulating layer comprising an opening;

a gate electrode, a first part of the gate electrode provided in the opening;

a gate insulating layer located between the second oxide semiconductor layer and the gate electrode; and

a third oxide semiconductor layer located between the second oxide semiconductor layer and the gate insulating layer,

wherein in a cross section parallel to a channel length direction of the transistor, a width of the opening is smaller than a width of the first oxide semiconductor layer,

wherein the first insulating layer comprises a first region overlapped with the first oxide semiconductor layer and a second region not overlapped with the first oxide semiconductor layer,

wherein a thickness of the first region of the first insulating layer is larger than a thickness of the second region of the first insulating layer,

wherein, in the cross section parallel to a channel width direction of the transistor, the gate electrode has a second part overlapping with the second region of the first insulating layer, and

wherein a bottom surface of the second part of the gate electrode is located below a bottom surface of the first oxide semiconductor layer.

10. The semiconductor device according to claim 9 , wherein the first oxide semiconductor layer is an island-shaped oxide semiconductor layer.

11. The semiconductor device according to claim 9 , wherein each of the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer comprises In-M-Zn oxide.

12. The semiconductor device according to claim 11 , wherein M is selected from the group consisting of aluminum, gallium, yttrium, and tin.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 12, 2021
From: YAMAZAKI, SHUNPEI; SAKAKURA, MASAYUKI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 058094/0116 →
Priority Claims (1)
JP 2014-069534 · Mar 28, 2014 · national
Continuity (6)
Continuation 17091218 · Nov 6, 2020
Continuation 16789474 · Feb 13, 2020
Continuation 16354327 · Mar 15, 2019
Continuation 15952433 · Apr 13, 2018
Continuation 14669459 · Mar 26, 2015
Related Publication 20220069136A1 · Mar 3, 2022
Cited By (1)
US 12,317,600