IP Library Granted Patent US 12,245,447
Granted Patent B2
US 12,245,447 · App. 17/531,803 · Granted Mar 4, 2025

Transistor substrate and manufacturing method

Inventor: Gen Koide (Tokyo, JP)
Assignee: JAPAN DISPLAY INC.
H10K30/80H01L27/14612H01L27/14643H10K71/00
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Quick Facts
Patent No.
US 12,245,447
App. No.
17/531,803
Granted
Mar 4, 2025
Kind
B2
Abstract

According to one embodiment, a transistor substrate includes a substrate, a light source and a sensor element. The light source is mounted on the substrate. The sensor element is mounted on the substrate. The sensor element includes a pixel electrode, a switching element, a common electrode and an organic photo detector layer. The switching element is electrically connected to the pixel electrode. The common electrode is opposed to the pixel electrode. The organic photo detector layer is provided between the pixel electrode and the common electrode. The light source is provided in a same layer as the organic photo detector layer.

Claims (20)

1. A transistor substrate comprising:

a substrate;

a light source mounted on the substrate; and

a sensor element mounted on the substrate,

the sensor element including a pixel electrode, a switching element electrically connected to the pixel electrode, a common electrode opposed to the pixel electrode, and an organic photo detector layer provided between the pixel electrode and the common electrode,

the light source including a micro LED which a lower surface of the micro LED is in contact with a connection conductive member, and a upper surface of the micro LED is in contact with the common electrode,

the micro LED surrounded by a black material provided in a same layer as the micro LED, and

the connection conductive member connected to a power line via a lower electrode in the same layer as the pixel electrode.

2. The transistor substrate of claim 1 , wherein

the switching element is electrically connected to a scanning line extending in a first direction and a signal line extending in a second direction intersecting the first direction, and

the light source and the sensor element are arranged in pixel regions partitioned by the scanning line and the signal line.

3. The transistor substrate of claim 2 ,

wherein the power line is electrically connected to the common electrode and provided in each of the pixel regions.

4. The transistor substrate of claim 1 ,

wherein

the power line has a first line width in a region overlapped on the lower electrode in planar view and a second line width thinner than the first line width in a region which is not overlapped on the lower electrode in planar view.

5. The transistor substrate of claim 1 , wherein

when the pixel electrode functions as a cathode and the common electrode functions as an anode in the sensor element, the organic photo detector layer has a stacked structure in which an electron-transport layer, an active layer, and a hole-transport layer are stacked in order.

6. The transistor substrate of claim 1 , wherein

when the pixel electrode functions as an anode and the common electrode functions as a cathode in the sensor element, the organic photo detector layer has a stacked structure in which a hole-transport layer, an active layer, and an electron-transport layer are stacked in order.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2021
From: KOIDE, GEN
To: JAPAN DISPLAY INC.
Reel/Frame 058177/0378 →
Priority Claims (1)
JP 2020-194461 · Nov 24, 2020 · national
Continuity (1)
Related Publication 20220165971A1 · May 26, 2022
References Cited (7)
US 20200380282A1 · Schwartz et al. · 2020 [cited by applicant]
US 20210391388A1 · Nakagawa et al. · 2021 [cited by applicant]
US 20220039697A1 · Higano et al. · 2022 [cited by applicant]
JP 2020511713A · 2020 [cited by applicant]
Nakagawa et al, WO 2020075009, Sensor Device and Semiconductor Apparatus, Apr. 16, 2020 (Year: 2020). [cited by examiner]
English-language translation of German Office Action issued May 28, 2024, in corresponding German Patent Application 10 2021 213 206.5, 5pp. [cited by applicant]
English-language translation of Japanese Office Action issued May 28, 2024, in corresponding Japanese Patent Application 2020-194461. [cited by applicant]