IP Library Granted Patent US 12,278,219
Granted Patent B2
US 12,278,219 · App. 17/538,078 · Granted Apr 15, 2025

LED chips and devices with textured light-extracting portions, and fabrication methods

Inventors: Peter Scott Andrews (Durham, NC); David Suich (Durham, NC); Kevin Haberern (Cary, NC); Justin White (Morrisville, NC)
Assignee: CreeLED, Inc.
H01L25/0753H01L33/005H01L33/502
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Quick Facts
Patent No.
US 12,278,219
App. No.
17/538,078
Granted
Apr 15, 2025
Kind
B2
Abstract

Pixelated-LED chips include substrate sidewalls with sidewall involutions and/or increased sidewall surface area regions to affect light extraction therefrom. A LED lighting device incorporates a superstrate that supports lumiphoric material and includes sidewalls with sidewall involutions and/or increased sidewall surface area regions. Methods for fabricating sidewall features may include etching (e.g., deep etching) of substrate or superstrate materials, such as by using an etch mask having edges with non-linear shapes to produce and/or enhance sidewall involutions when an etchant is supplied through the etch mask to selectively consume substrate or superstrate material.

Claims (39)

1. A LED chip comprising:

an active layer;

a substrate comprising a light-transmissive material with a light extraction face laterally bounded by a plurality of substrate sidewalls;

an anode and a cathode associated with the active layer;

an underfill material arranged on the plurality of substrate sidewalls; and

at least one lumiphoric material arranged on the light extraction face, wherein the at least one lumiphoric material is configured to receive at least a portion of light emitted by the active layer and responsively generate lumiphor emissions;

wherein each substrate sidewall of the plurality of substrate sidewalls comprises at least one of the following features (a) or (b):

(a) each substrate sidewall comprises a plurality of sidewall involutions that are substantially aligned in a direction generally parallel to a height direction of the substrate sidewall;

(b) each substrate sidewall comprises a plurality of non-coplanar surface portions that confer a sidewall surface area at least 30% greater than a comparable substrate sidewall of the same length and height dimensions but devoid of non-coplanar surface portions.

2. The LED chip of claim 1 , wherein each substrate sidewall comprises an etched surface.

3. The LED chip of claim 1 , wherein each substrate sidewall comprises a plurality of sidewall involutions that are substantially aligned in a direction generally parallel to a height direction of the substrate sidewall.

4. The LED chip of claim 3 , wherein for each substrate sidewall of the plurality of substrate sidewalls, at least some sidewall involutions of the plurality of sidewall involutions extend at least 0.5 micrometer into the substrate sidewall in a direction perpendicular to a length of the substrate sidewall at a midpoint height of the substrate sidewall.

5. The LED chip of claim 3 , wherein at least some sidewall involutions of the plurality of sidewall involutions are present in an amount of at least 2 involutions per micrometer of substrate sidewall length.

6. The LED chip of claim 1 , wherein each substrate sidewall comprises a plurality of non-coplanar surface portions that confer a sidewall surface area at least 30% greater than a comparable substrate sidewall of the same length and height dimensions but devoid of non-coplanar surface portions.

7. The LED chip of claim 1 , wherein each substrate sidewall comprises a plurality of non-coplanar surface portions that confer a sidewall surface area in a range of from 30% greater to 100% greater than a comparable substrate sidewall of the same length and height dimensions but devoid of non-coplanar surface portions.

8. The LED chip of claim 1 , wherein the substrate comprises silicon carbide or sapphire.

9. The LED chip of claim 1 , wherein the light extraction face comprises a non-repeating irregular textural pattern.

10. The LED chip of claim 1 , wherein the substrate comprises a growth substrate on which the active layer was grown.

11. The LED chip of claim 1 , wherein the anode and the cathode are substantially coplanar.

12. A pixelated-LED chip comprising:

an active layer comprising a plurality of active layer portions;

a substrate comprising a plurality of substrate portions supporting the plurality of active layer portions, wherein each substrate portion comprises a light-transmissive material with a light extraction face laterally bounded by a plurality of substrate sidewalls;

a plurality of anode-cathode pairs associated with the plurality of active layer portions;

an underfill material arranged on the plurality of substrate sidewalls; and

at least one lumiphoric material arranged on the light extraction face of each substrate portion, wherein the at least one lumiphoric material is configured to receive at least a portion of light emitted by the active layer portions and responsively generate lumiphor emissions;

wherein each active layer portion of the plurality of active layer portions is configured to illuminate a different substrate portion of the plurality of substrate portions and transmit light through the light extraction face of the substrate portion, such that the plurality of active layer portions and the plurality of discontinuous substrate portions form a plurality of pixels; and

wherein each substrate sidewall of the plurality of substrate sidewalls comprises at least one of the following features (a) or (b):

(a) each substrate sidewall comprises a plurality of sidewall involutions that are substantially aligned in a direction generally parallel to a height direction of the substrate sidewall;

(b) each substrate sidewall comprises a plurality of non-coplanar surface portions that confer a sidewall surface area at least 50% greater than a comparable substrate sidewall of the same length and height dimensions but devoid of non-coplanar surface portions.

13. The pixelated-LED chip of claim 12 , wherein each substrate sidewall comprises an etched surface.

14. The pixelated-LED chip of claim 12 , wherein each substrate sidewall comprises a plurality of sidewall involutions that are substantially aligned in a direction generally parallel to a height direction of the substrate sidewall.

15. The pixelated-LED chip of claim 14 , wherein for each substrate sidewall of the plurality of substrate sidewalls, at least some sidewall involutions of the plurality of sidewall involutions extend at least 0.5 micrometer into the substrate sidewall in a direction perpendicular to a length of the substrate sidewall at a midpoint height of the substrate sidewall.

16. The pixelated-LED chip of claim 14 , wherein at least some sidewall involutions of the plurality of sidewall involutions are present in an amount of at least 2 involutions per micrometer of substrate sidewall length.

17. The pixelated-LED chip of claim 12 , wherein each substrate sidewall comprises a plurality of non-coplanar surface portions that confer a sidewall surface area at least 30% greater than a comparable substrate sidewall of the same length and height dimensions but devoid of non-coplanar surface portions.

18. The pixelated-LED chip of claim 12 , wherein each substrate sidewall comprises a plurality of non-coplanar surface portions that confer a sidewall surface area in a range of from 30% greater to 100% greater than a comparable substrate sidewall of the same length and height dimensions but devoid of non-coplanar surface portions.

19. The pixelated-LED chip of claim 12 , wherein the substrate comprises silicon carbide or sapphire.

20. The pixelated-LED chip of claim 12 , wherein for each substrate portion of the plurality of substrate portions, wherein the light extraction face comprises a non-repeating irregular textural pattern.

21. The pixelated-LED chip of claim 12 , wherein the substrate comprises a growth substrate on which the active layer was grown.

22. The pixelated-LED chip of claim 12 , wherein each anode-cathode pair of the plurality of anode-cathode pairs is substantially coplanar.

Assignments (4)
PATENT SECURITY AGREEMENT Recorded Jun 30, 2025
From: CREELED, INC.; PENGUIN SOLUTIONS CORPORATION (DE); SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; SMART MODULAR TECHNOLOGIES, INC.; PENGUIN COMPUTING, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 071755/0001 →
RELEASE OF PATENT SECURITY INTEREST RECORDED AT R/F 058983/0001 Recorded Jun 25, 2025
From: CITIZENS BANK, N.A.
To: SMART MODULAR TECHNOLOGIES, INC.; SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; CREELED, INC.
Reel/Frame 071725/0207 →
SECURITY INTEREST Recorded Feb 7, 2022
From: SMART MODULAR TECHNOLOGIES, INC.; SMART HIGH RELIABILITY SOLUTIONS, LLC; SMART EMBEDDED COMPUTING, INC.; CREELED, INC.
To: CITIZENS BANK, N.A.
Reel/Frame 058983/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2021
From: ANDREWS, PETER SCOTT; HABERERN, KEVIN; SUICH, DAVID; WHITE, JUSTIN
To: CREELED, INC.
Reel/Frame 058308/0560 →