IP Library › Granted Patent US 11,587,731
Granted Patent B2
US 11,587,731 · App. 17/544,992 · Granted Feb 21, 2023

Electronic component, circuit board, and method of mounting electronic component on circuit board

Inventors: Eiji Teraoka (Nagaokakyo, JP); Hirokazu Takashima (Nagaokakyo, JP)
Assignee: MURATA MANUFACTURING CO., LTD.
H01G4/12H01G4/012H01G4/228H01G4/30
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Quick Facts
Patent No.
US 11,587,731
App. No.
17/544,992
Granted
Feb 21, 2023
Kind
B2
Abstract

An electronic component includes a laminate in which first internal electrodes and second internal electrodes are alternately laminated in a lamination direction with dielectric layers interposed therebetween, the laminate including a first main surface and a second main surface opposite to each other in the lamination direction, a first side surface and a second side surface opposite to each other in a width direction, and a first end surface and a second end surface opposite to each other in a length direction, a first external electrode provided on a surface of the laminate and electrically connected to the first internal electrodes, a second external electrode provided on a surface of the laminate and electrically connected to the second internal electrodes, and side margin portions each including a dielectric including Ca, Zr, and Ti.

Claims (42)

1. An electronic component, comprising:

a laminate including an inner layer portion including first internal electrodes and second internal electrodes that are alternately laminated in a lamination direction with dielectric layers interposed between the first internal electrodes and the second internal electrodes, and outer layer portions that sandwich the inner layer portion in the lamination direction, the laminate further including:

a first main surface and a second main surface opposite to each other in the lamination direction;

a first side surface and a second side surface opposite to each other in a width direction orthogonal or substantially orthogonal to the lamination direction; and

a first end surface and a second end surface opposite to each other in a length direction orthogonal or substantially orthogonal to the lamination direction and the width direction;

a first external electrode provided on at least the first end surface of the laminate and electrically connected to the first internal electrodes; and

a second external electrode provided on at least the second end surface of the laminate and electrically connected to the second internal electrodes; wherein

when a cross section including the length direction and the width direction of the laminate is viewed from the lamination direction, side margin portions each include a dielectric including Ca, Zr, and Ti, each of the side margin portions being a region in which none of the first internal electrodes and the second internal electrodes are disposed;

the side margin portions are located on outer sides of the laminate and sandwich the inner layer portion and the outer layer portions in the width direction;

the dielectric layers do not include Ca and Zr;

each of the side margin portions includes a first portion and a second portion, and the first portion of the side margin portion is closer to the first and second internal electrodes than the second portion of the side margin portion in the width direction; and

each of the side margin portions includes Si, and a molar ratio of Si/Ti in the second portion is higher than a molar ratio of Si/Ti in the first portion.

2. The electronic component according to claim 1 , wherein each of the dielectric layers between each of the first internal electrodes and each the second internal electrodes includes a dielectric material including Ba and Ti as main components.

3. The electronic component according to claim 1 , wherein a dimension of the side margin portions in the width direction is about 5 μm or more and about 30 μm or less.

4. The electronic component according to claim 1 , wherein

a number of laminated internal electrodes including the first internal electrodes and the second internal electrodes is 10 or more and 500 or less;

a distance between the first main surface and an internal electrode at a position closest to the first main surface among the first internal electrodes and the second internal electrodes is about 5 μm or more and about 30 μm or less;

a distance between the second main surface and an internal electrode at a position closest to the second main surface among the first internal electrodes and the second internal electrodes is about 5 μm or more and about 30 μm or less.

5. The electronic component according to claim 1 , wherein the first internal electrodes and the second internal electrodes each include Cu.

6. The electronic component according to claim 1 , wherein the electronic component includes:

a dimension in the length direction of about 0.2 mm or more and about 3.2 mm or less;

a dimension in the width direction of about 0.1 mm or more and about 1.6 mm or less; and

a dimension in the lamination direction of about 0.1 mm or more and about 1.6 mm or less.

7. A circuit board on which the electronic component according to claim 1 is mounted, wherein the electronic component is mounted so that the side margin portions thereof face a mounting surface of the circuit board.

8. The circuit board according to claim 7 , wherein a distance between an end portion of the electronic component on a circuit board side and the mounting surface of the circuit board is about 20 μm or more and about 50 μm or less.

9. A method of mounting the electronic component according to claim 1 on a circuit board, the method comprising:

mounting the electronic component on the circuit board so that the side margin portions of the electronic component face a mounting surface of the circuit board.

10. The electronic component according to claim 1 , wherein the first external electrode and the second external electrode face each other.

11. The electronic component according to claim 1 , wherein the side margin portions extend from the first main surface to the second main surface.

12. The electronic component according to claim 11 , wherein each of the outer layer portions is a region in which none of the first internal electrodes and the second internal electrodes are disposed and includes at least one dielectric layer.

13. The electronic component according to claim 1 , wherein the side margin portions include a plurality of side margin layers laminated in the width direction.

14. The electronic component according to claim 13 , wherein the first portions of the side margin portions include inner side margin layers of the plurality of side margin layers, and the second portions of the side margin portions include outer side margin layers of the plurality of side margin layers.

15. The electronic component according to claim 14 , wherein a dimension in the width direction of the outer side margin layers is larger than a dimension in the width direction of the inner side margin layers.

16. The electronic component according to claim 1 , wherein:

the first external electrode is provided on an entirety or substantially an entirety of the first end surface of the laminate; and

the second external electrode is provided on an entirety or substantially an entirety of the second end surface of the laminate.

17. The electronic component according to claim 1 , wherein

the first external electrode includes a three-layer structure including a first base electrode layer, a first lower plating layer provided on a surface of the first base electrode layer, and a first upper plating layer provided on a surface of the first lower plating layer; and

the second external electrode includes a three-layer structure including a second base electrode layer, a second lower plating layer provided on a surface of the second base electrode layer, and a second upper plating layer provided on a surface of the second lower plating layer.

18. The electronic component according to claim 17 , wherein:

the first base electrode layer is provided on an entirety or substantially an entirety of the first end surface of the laminate; and

the second base electrode layer is provided on an entirety or substantially an entirety of the second end surface of the laminate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2021
From: TERAOKA, EIJI; TAKASHIMA, HIROKAZU
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 058336/0491 →
Priority Claims (1)
JP JP2018-189163 · Oct 4, 2018 · national
Continuity (2)
Continuation 16581847 · Sep 25, 2019
Related Publication 20220093334A1 · Mar 24, 2022
Cited By (2)
US 12,224,122 US 12,640,309