Method for forming a semiconductor structure
A method for forming a semiconductor structure includes forming a gate structure on a substrate, performing a deposition process to form a nitride layer to cover the substrate and the gate structure, performing an in-situ annealing process to the nitride layer, and performing an anisotropic etching process to the nitride layer after the in-situ annealing process to form a spacer on a sidewall of the gate structure.
1. A method for forming a semiconductor structure, comprising:
forming a gate structure on a substrate, wherein the gate structure comprises:
an interfacial layer on the substrate;
a high-k dielectric layer on the interfacial layer;
a polysilicon layer on the high-k dielectric layer; and
a hard mask layer on the polysilicon layer;
performing a deposition process to form a nitride layer to cover the substrate and the gate structure, wherein a process temperature of the deposition process is between 600° C. and 650° C.;
performing an in-situ annealing process to the nitride layer, wherein a process temperature of the in-situ annealing process is higher than 700° C.; and
performing an anisotropic etching process to the nitride layer after the in-situ annealing process to form a spacer on the substrate and covering sidewalls of the interfacial layer, the high-k dielectric layer, the polysilicon layer and the hard mask layer of the gate structure, wherein a bottom width of a portion of the spacer on the sidewall of the interfacial layer is 1.1 times of a middle width of another portion of the spacer on the sidewall of the polysilicon layer.
2. The method for forming a semiconductor structure according to claim 1 , wherein the deposition process is a low pressure chemical vapor deposition (LPCVD) process using dichlorosilane (DCS) and ammonia (NH3) as source gases to form the nitride layer.
3. The method for forming a semiconductor structure according to claim 1 , wherein the in-situ annealing process is performed in a nitrogen (N2) atmosphere.
4. The method for forming a semiconductor structure according to claim 1 , wherein the process temperature of the in-situ annealing process is higher than 700° C. and lower than 800° C.
5. The method for forming a semiconductor structure according to claim 4 , wherein the process temperature of the in-situ annealing process is between 750° C. and 770° C.
6. The method for forming a semiconductor structure according to claim 1 , wherein a process time of the in-situ annealing process is between 30 and 120 minutes.
7. The method for forming a semiconductor structure according to claim 1 , wherein a thickness of the nitride layer is between 80 and 100 Å.
8. The method for forming a semiconductor structure according to claim 1 , wherein the deposition process and the in-situ annealing process are performed by a same low pressure furnace equipment.
9. The method for forming a semiconductor structure according to claim 1 , wherein the anisotropic etching process comprises using O2, CH2F2 and CHF3.
10. The method for forming a semiconductor structure according to claim 1 , further comprising forming a source/drain region in the substrate and adjacent to the spacer.