Method and apparatus for improved wafer coating

1. A method for manufacturing a semiconductor device, comprising:

depositing a metallization layer;

depositing a first passivation layer disposed above the metallization layer;

depositing a copper redistribution layer disposed on the first passivation layer;

etching a first gap through the copper redistribution layer;

depositing a second passivation layer on the copper redistribution layer and within the first gap;

depositing a polyimide layer comprising tetraethylene glycol dimethacrylate over the second passivation layer; and

etching a second gap through the polyimide layer and the second passivation layer to expose a portion of the copper redistribution layer,

wherein the polyimide layer has a viscosity that allows gap fill of at least 2 micrometers.

2. The method of claim 1 , wherein the copper redistribution layer has a width-to-space (W/S) ratio of between 1/1 to 1/1.4.

3. The method of claim 1 , wherein the polyimide layer has a mean thickness between 5 and 10.5 micrometers.

4. The method of claim 1 , wherein the tetraethylene glycol dimethacrylate is between 1% and 5% composition by weight of the polyimide layer.

5. The method of claim 1 , wherein the second passivation layer comprises silicon nitride and has a thickness between 1 and 1.5 micrometers.

6. The method of claim 1 , wherein the first passivation layer comprises a super high density, metal-insulator-metal (SHD-MIM) material.

7. The method of claim 1 , further comprising forming a via through the first passivation layer such that the copper redistribution layer is electrically connected to the metallization layer.

8. The method of claim 1 , further comprising:

depositing an extremely low-k dielectric layer before said depositing of the metallization layer.

9. The method of claim 1 , further comprising:

depositing a copper bump layer within the second gap so that the copper bump layer is in contact with the copper redistribution layer; and

depositing a solder cap on the copper bump layer thereby forming an input-output contact.

10. The method of claim 1 , wherein the copper redistribution layer has a thickness between 6.3 and 6.5 micrometers.

11. A method of manufacturing a semiconductor device, comprising:

depositing an extremely low-k dielectric layer;

depositing a metallization layer on the extremely low-k dielectric layer;

depositing a first passivation layer on the metallization layer, wherein the first passivation layer comprises a super high density, metal-insulator-metal (SHD-MIM) material;

etching a via through the first passivation layer to expose a portion of the metallization layer;

depositing a copper redistribution layer (Cu RDL) over a portion of the first passivation layer having the via;

depositing a second passivation layer over the Cu RDL;

spin-coating a polyimide photoresist composition over the second passivation layer to form a polyimide photoresist layer; and

etching an opening through the polyimide photoresist layer and the second passivation layer to expose a portion of the Cu RDL.

12. The method of claim 11 , further comprising:

depositing a copper bump layer within the opening.

13. The method of claim 12 , further comprising:

depositing a solder cap layer over the copper bump layer thereby forming an input/output contact of the semiconductor device.

14. The method of claim 11 , wherein the spin-coating the polyimide photoresist composition further comprises:

disposing a nozzle over the second passivation layer;

rotating the semiconductor device at a first speed;

dispensing a polyimide photoresist composition on the second passivation layer to form an inner circle;

moving the semiconductor device in a lateral direction to form a first portion of a spiral arm extending form the inner circle wherein the first portion of the spiral arm has a first width;

rotating the semiconductor device at a second speed lower than the first speed while continuing to dispense the polyimide photoresist composition such that a second portion of the spiral arm extends from the first portion of the spiral arm, the second portion having a second width greater than the first width;

discontinuing the dispensing of the polyimide photoresist composition; and

rotating the semiconductor device at a third speed higher than the first speed to force the polyimide photoresist composition to spread over a surface of the second passivation layer and form a polyimide layer with a substantially even thickness.

15. The method of claim 14 , wherein a ratio of a diameter of the inner circle to a maximum diameter of a spiral coil formed by the first and second spiral arm portions is about 1:1.3.

16. A method for fabricating a semiconductor device, comprising:

depositing a metallization layer;

depositing a first passivation layer over the metallization layer;

depositing a copper redistribution layer over the first passivation layer;

forming a first gap through the copper redistribution layer;

disposing a second passivation layer on the copper redistribution layer and within the first gap;

depositing a polyimide layer over the second passivation layer, wherein the polyimide layer has a viscosity that allows gap fill of at least 2 micrometers; and

forming a second gap through the polyimide layer and the second passivation layer to expose a portion of the copper redistribution layer.

17. The method of claim 16 , wherein the copper redistribution layer has a width-to-space (W/S) ratio of between 1/1 to 1/1.4 and a thickness between 6.3 and 6.5 micrometers.

18. The method of claim 16 , wherein the polyimide layer has a mean thickness between 5 and 10.5 micrometers.

19. The method of claim 16 , wherein the polyimide layer includes tetraethylene glycol dimethacrylate in an amount of between 1% and 5% composition by weight of the polyimide layer.

20. The method of claim 16 , wherein the second passivation layer comprises silicon nitride and has a thickness between 1 and 1.5 micrometers.