IP Library Granted Patent US 11,917,768
Granted Patent B2
US 11,917,768 · App. 17/584,003 · Granted Feb 27, 2024

Single-layer circuit board, multi-layer circuit board, and manufacturing methods therefor

Inventors: Siping Bai (Zhuhai, CN); Xianglan Wu (Zhuhai, CN); Zhijian Wang (Zhuhai, CN); Zhigang Yang (Zhuhai, CN); Jinqiang Zhang (Zhuhai, CN)
Assignee: RICHVIEW ELECTRONICS CO., LTD.
H05K3/429C23C14/48H05K1/115H05K3/105H05K3/42H05K3/422H05K3/423H05K3/427H05K3/048H05K3/06H05K3/108H05K3/421H05K3/426H05K3/4617H05K2201/0355H05K2201/096H05K2203/0565H05K2203/0769H05K2203/092H05K2203/1423
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Quick Facts
Patent No.
US 11,917,768
App. No.
17/584,003
Granted
Feb 27, 2024
Kind
B2
Abstract

A multi-layer circuit board, successively constituted by surface sticking layer, single-layer circuit board, middle sticking layer, single-layer circuit board, surface sticking layer, said multi-layer circuit board is provided with a hole, a hole wall of said hole is formed with conductive seed layer, and partial outer surface of said surface sticking layer is formed with a circuit pattern layer of conductive seed layer, wherein said conductive seed layer comprises a ion implantation layer implanting below the hole wall of said hole and below partial outer surface of said surface sticking layer.

Claims (3)

1. A multi-layer circuit board, successively constituted by surface sticking layer, single-layer circuit board, middle sticking layer, single-layer circuit board, surface sticking layer, said multi-layer circuit board is provided with a hole, a hole wall of said hole is formed with conductive seed layer, and partial outer surface of said surface sticking layer is formed with a circuit pattern layer of conductive seed layer, wherein said conductive seed layer comprises a ion implantation layer implanting below the hole wall of said hole and below partial outer surface of said surface sticking layer.

2. The multi-layer circuit board of claim 1 , wherein said ion implantation layer is located below the hole wall of said hole and/or below the partial outer surface of said surface sticking layer for a depth of 1-500 nm, and forms steady doping structure with a substrate of said multi-layer circuit board.

3. The multi-layer circuit board of claim 1 , wherein said conductive seed layer further comprises a plasma deposition layer adhered above said ion implantation layer, which plasma deposition layer has a thickness of 1-10000 nm.

Assignments (2)
CHANGE OF NAME Recorded Aug 6, 2025
From: RICHVIEW ELECTRONICS CO., LTD.
To: THINKTRANS ELECTRONIC MATERIALS (SHENZHEN) CO., LTD.
Reel/Frame 072361/0575 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2022
From: BAI, SIPING; WU, XIANGLAN; WANG, ZHIJIAN; YANG, ZHIGANG; ZHANG, JINQIANG
To: RICHVIEW ELECTRONICS CO., LTD.
Reel/Frame 058763/0748 →
Priority Claims (1)
CN 201510747884.1 · Nov 6, 2015 · national
Continuity (4)
Division 16911911 · Jun 25, 2020
Division 16382103 · Apr 11, 2019
Division 15773772
Related Publication 20220151081A1 · May 12, 2022