Method for manufacturing silicon carbide semiconductor device and silicon carbide semiconductor device
A method for manufacturing a silicon carbide semiconductor device, includes the steps of depositing an insulating film on a principal surface of a silicon carbide substrate, forming a contact hole in the insulating film and exposing the principal surface, forming a Si film on bottom and a side surfaces of the contact hole, and a top surface of the insulating film, removing the Si film on the bottom surface of the contact hole and exposing the principal surface, depositing a Ni film on the bottom surface of the contact hole and the Si film, and performing a heat treatment to form a first alloy layer, which becomes an ohmic electrode, at the bottom surface of the contact hole by Si included in the substrate and the Ni film, and a second alloy layer at the top surface of the insulating film by the Si film and the Ni film.
1. A method for manufacturing a silicon carbide semiconductor device, comprising:
preparing a silicon carbide substrate;
depositing an insulating film on one principal surface of the silicon carbide substrate;
forming a contact hole in the insulating film, and exposing the one principal surface at a bottom surface of the contact hole;
forming a Si film on the bottom surface and a side surface of the contact hole, and a top surface of the insulating film;
removing the Si film on the bottom surface of the contact hole, and exposing the one principal surface;
depositing a Ni film on the bottom surface of the contact hole, and the Si film; and
performing a heat treatment after depositing the Ni film,
wherein the heat treatment forms a first alloy layer, which becomes an ohmic electrode, at the bottom surface of the contact hole by Si included in the silicon carbide substrate and the Ni film, and forms a second alloy layer at the top surface of the insulating film by the Si film and the Ni film.
2. The method for manufacturing the silicon carbide semiconductor device as claimed in claim 1 , wherein a temperature of the heat treatment is 800° C. or higher but 1100° ° C. or lower.
3. The method for manufacturing the silicon carbide semiconductor device as claimed in claim 1 , wherein a ratio of a number of Si atoms, to a sum of the number of Si atoms and a number of Ni atoms, per unit area included in the Si film and the Ni film at the top surface of the insulating film, is 33 atomic % or greater but 67 atomic % or less, in a state after the depositing the Ni film and before the performing the heat treatment.
4. The method for manufacturing the silicon carbide semiconductor device as claimed in claim 1 , wherein a thickness of the Ni film is 5 nm or greater but 100 nm or less.
5. The method for manufacturing the silicon carbide semiconductor device as claimed in claim 1 , wherein a thickness of the Si film is 5 nm or greater but 100 nm or less, and a thickness of the Ni film is 5 nm or greater but 100 nm or less.
6. The method for manufacturing the silicon carbide semiconductor device as claimed in claim 1 , further comprising:
removing, after the performing the heat treatment, an unreacted portion of the Ni film which does not react with either the silicon carbide substrate or the Si film, by wet etching.
7. The method for manufacturing the silicon carbide semiconductor device as claimed in claim 1 , wherein the second alloy layer is also formed on the side surface of the contact hole.
8. A silicon carbide semiconductor device comprising:
a silicon carbide substrate having a first principal surface, and a second principal surface opposite to the first principal surface;
an insulating film provided on the first principal surface;
a contact hole provided in the insulating film;
a first alloy layer, including Ni and Si, in contact with the silicon carbide substrate at a bottom surface of the contact hole; and
a second alloy layer, including Ni and Si, provided on a top surface of the insulating film,
wherein the first alloy layer makes ohmic contact with the silicon carbide substrate, and
wherein a Si concentration of Si included in the second alloy layer is greater than a Si concentration of Si included in the first alloy layer.
9. The silicon carbide semiconductor device as claimed in claim 8 , wherein the second alloy layer is also provided on a side surface of the contact hole.
10. The silicon carbide semiconductor device as claimed in claim 8 , wherein a ratio of a number of Si atoms, to a sum of the number of Si atoms and a number of Ni atoms, per unit area included in the second alloy layer, is 33 atomic % or greater and 67 atomic % or less.
11. The silicon carbide semiconductor device as claimed in claim 8 , further comprising:
a barrier layer provided on the second alloy layer; and
an interconnect layer provided on the barrier layer.
12. The silicon carbide semiconductor device as claimed in claim 11 , wherein the barrier layer is formed of TiN or TaN.
13. The silicon carbide semiconductor device as claimed in claim 11 , wherein the interconnect layer is formed of a metal including Al.
14. The silicon carbide semiconductor device as claimed in claim 11 , wherein a ratio of a number of Si atoms, to a sum of the number of Si atoms and a number of Ni atoms, per unit area included in the second alloy layer, is 33 atomic % or greater and 67 atomic % or less.
15. The silicon carbide semiconductor device as claimed in claim 8 , wherein a thickness of the Ni film is 5 nm or greater but 100 nm or less.
16. The silicon carbide semiconductor device as claimed in claim 15 , wherein a thickness of the Si film is 5 nm or greater but 100 nm or less, and a thickness of the Ni film is 5 nm or greater but 100 nm or less.
17. The silicon carbide semiconductor device as claimed in claim 8 , wherein a thickness of the Si film is 5 nm or greater but 100 nm or less, and a thickness of the Ni film is 5 nm or greater but 100 nm or less.