IP Library Patent Application 17643854
Patent Application
App. No. 17/643,854

Processing Unit, Software module, Methods and Program Codes

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Quick Facts
Patent No.
US None
App. No.
17/643,854
Abstract

A processing unit is provided. The processing unit includes one or more interfaces configured to communicate with at least one hardware component and processing circuitry configured to control the one or more interfaces and to determine a superset of a plurality of hardware microservices of the at least one hardware component.

Claims (57)

1 . Processing unit, comprising:

one or more interfaces configured to communicate with at least one hardware component; and

processing circuitry configured to control the one or more interfaces and to:

determine a superset of a plurality of hardware microservices of the at least one hardware component.

2 . The processing unit according to claim 1 , wherein

the processing circuitry is further configured to generate a list comprising the plurality of hardware microservices.

3 . The processing unit according to claim 1 , wherein

the processing circuitry is further configured to:

observe a status of the at least one hardware component; and

if the status of the at least one hardware component has changed redetermine a hardware microservice of the at least one hardware component.

4 . A software module, comprising:

one or more interfaces configured to communicate with a processing unit; and

processing circuitry configured to control the one or more interfaces and to:

receive information about a superset of a plurality of hardware microservices of at least one hardware component;

provide information about the superset; and

generate a subset based on a user input.

5 . The software according to claim 4 , wherein

provide information about the superset and generate a subset is comprised by an exploring process.

6 . The software module according to claim 4 , wherein

the processing circuitry is further configured to:

check if an update of the received information is available; and

if the received information has been updated receive updated information about the plurality of hardware microservices.

7 . The software module according to claim 4 , wherein

the processing circuitry is further configured to synchronize the plurality of hardware microservices to provide them to an external processing unit.

8 . The software module according to claim 4 , wherein

if a plurality of hardware microservice of the plurality of hardware microservices is selected the processing circuitry is further configured to generate a query plan for the plurality of hardware microservice.

9 . The software module according to claim 8 , wherein

the processing circuitry is further configured to render the query plan of the plurality of hardware microservices into a hierarchical tree.

10 . The software module according to claim 4 , wherein

the processing circuitry is further configured to generate a sequence flow of the subset.

11 . The software module according to claim 10 , wherein

generate the sequence flow is comprised by a modeling process.

12 . The software module according to claim 10 , wherein

the processing circuitry is further configured to check if an output parameter of a first hardware microservice of the plurality of hardware microservices in the sequence flow matches an input parameter of a second hardware microservice of the plurality of hardware microservices in the sequence flow.

13 . The software module according to claim 10 , wherein

the processing circuitry is further configured to generate an agnostic code from the sequence flow.

14 . The software module according to claim 13 , wherein

the processing circuitry is further configured to transmit the agnostic code to an external processing unit to enable the external processing to use the plurality of hardware microservices.

15 . The software module according to claim 10 , wherein

the processing circuitry is further configured to decode the agnostic code to a native-code type.

16 . The software module according to claim 15 , wherein

decode the agnostic code is comprised by a deploying process.

17 . A method, comprising:

receiving information about a superset of a plurality of hardware microservices of at least one hardware component; and

selecting at least one hardware microservice of the plurality of hardware microservices.

18 . The method according to claim 17 , further comprising,

generating a subset comprising the at least one hardware microservice.

19 . The method according to claim 17 , further comprising

checking if an update of the received information is available; and

if the received information has been updated receiving updated information about the plurality of hardware microservices.

20 . The method according to claim 17 , further comprising

synchronizing the plurality of hardware microservices to provide them to an external processing unit.

21 . The method according to claim 17 , further comprising

if a plurality of hardware microservice of the plurality of hardware microservices is selected generating a query plan for the plurality of hardware microservice.

22 . The method according to claim 21 , further comprising

rendering the query plan of the plurality of hardware microservices into a hierarchical tree.

23 . A non-transitory, computer-readable medium comprising a program code that, when the program code is executed on a computer, a processor, or a programmable hardware component, performs receiving information about a superset of a plurality of hardware microservices of the at least one hardware component and selecting at least one hardware microservice of the plurality of hardware microservices.

Assignments (3)
SECURITY INTEREST Recorded Sep 12, 2025
From: ALTERA CORPORATION
To: BARCLAYS BANK PLC, AS COLLATERAL AGENT
Reel/Frame 073431/0309 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2024
From: INTEL CORPORATION
To: ALTERA CORPORATION
Reel/Frame 066353/0886 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 13, 2021
From: TAN, TAT KIN; ABDUL RASHID, KAMARUL ZAMAN
To: INTEL CORPORATION
Reel/Frame 058367/0656 →