IP Library Granted Patent US 12,456,512
Granted Patent B2
US 12,456,512 · App. 17/649,173 · Granted Oct 28, 2025

Systems, apparatuses, and methods of using local input/output (LIO) lines for precharging and equalizing digit lines of sense amplifiers

Inventor: John Schreck (Boise, ID)
Assignee: Micron Technology, Inc.
G11C11/4091G11C5/06G11C11/4074G11C11/4093
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Quick Facts
Patent No.
US 12,456,512
App. No.
17/649,173
Granted
Oct 28, 2025
Kind
B2
Abstract

Local input/output (LIO) lines may be used for precharging and equalizing the digit lines associated with a sense amplifier. The precharge device and equalization device of the associated sense amplifier may be omitted in some examples. In some examples, an equalization device may short the lines of a LIO line pair together. The LIO line pair may drive one or more pairs of digit lines to a precharge potential. Digit lines may be connected to the LIO line pair and driven to a midpoint potential in some examples.

Claims (65)

1 . An apparatus comprising:

a first digit line pair;

a first sense amplifier coupled to the first digit line pair,

a second digit line pair;

a second sense amplifier coupled to the second digit line pair;

a local data line pair configured to be selectively connected to the first sense amplifier and the second sense amplifier;

an equalization device consisting of a single transistor coupled between a first line and a second line of the local data line pair, wherein the equalization device is configured to selectively connect the first line and the second line together and the equalization device is shared by the first and the second sense amplifiers; and

a digit precharge voltage circuit consisting of a single transistor configured to selectively connect the first line, the second line, or both to a midpoint potential, the digit precharge voltage circuit coupled to the first line of the local data line pair through the equalization device and the digit precharge voltage circuit coupled to the second line of the local data line pair,

wherein during a digit precharge operation;

the first line and the second line of the local data line pair are connected together by the equalization device;

the first line, the second line or both of the local data line pair are connected to the midpoint potential by the digit precharge voltage circuit; and

the first line and the second line are connected to the first digit line pair or the second digit line pair or both and provide the midpoint potential to the first digit line pair or the second digit line pair or both.

2 . The apparatus of claim 1 , wherein the equalization device selectively connects the first line and the second line based, at least in part, on a state of an equalization control signal provided to the equalization device.

3 . A method comprising:

connecting a first line and a second line of a local data line pair together;

providing to the first line, the second line, or both a midpoint potential; and

activating a plurality of column select signal lines to connect the local data line pair to a plurality of digit line pairs coupled to corresponding ones of a plurality of sense amplifiers while the first line and the second line are connected together and while the midpoint potential is provided to the first line, the second line, or both, wherein the midpoint potential is provided to the plurality of digit line pairs by the local data line pair during a digit line precharge operation.

4 . The method of claim 3 , wherein the column select signal is activated, based, at least in part, on an address associated with an access command.

5 . The method of claim 3 , wherein connecting the first line and the second line together drive the first line and the second line to the midpoint potential.

6 . The method of claim 5 , wherein the midpoint potential is equal to a digit line precharge potential.

7 . A system comprising:

a plurality of digit line pairs;

a plurality of sense amplifiers coupled to corresponding ones of the plurality of digit line pairs;

a local data line pair configured to be selectively connected to the plurality of sense amplifiers;

a digit precharge voltage circuit consisting of a single transistor configured to selectively provide a digit line precharge potential to a first line, a second line, or both lines of the local data line pair; and

an equalization device consisting of a single transistor coupled between the first line and the second line of the local data line pair, wherein:

the equalization device is configured to selectively connect the first line and the second line together;

the equalization device is shared by the plurality of sense ainplifiers:

the digit precharge voltage circuit is coupled to the first line of the local data lie pair through the equalization device and the digit precharge voltage circuit is coupled to the second line of the local data line pair; and

during a digit precharge operation, the first line and the second line are connected together and connect to the plurality of digit lines, and the fust line, the second line or both lines are provided with the digit line precharge potential to provide the digit line precharge potential to the plurality of digit lines.

8 . The system of claim 7 , wherein the digit line precharge potential comprises a midpoint potential relative to a precharge potential of the local data line pair.

9 . A method comprising:

connecting a local data line pair to a digit line pair;

connecting a first line and a second line of the local data line pair together;

driving the first line and the second line to a precharge voltage;

activating a column select signal line to connect the local data line pair to the digit line pair; and

providing, by connecting the local data lime pair to the digit line pair, the precharge voltage to the digit line pair during a digit line precharge operation.

10 . An apparatus comprising:

a digit line pair;

a sense amplifier coupled to the digit line pair and configured to selectively connect the digit line pair to a local data line pair;

an equalization device consisting of a single transistor coupled between a first line and a second line of the local data line pair and configured to selectively connect the first line and the second line together; and

a digit precharge voltage circuit consisting of a single transistor coupled to a digit precharge potential and configured to selectively connect the first line and the second line to the digit line precharge potential;

wherein:

the digit precharge voltage circuit is coupled to the first line of the local data line pair through the equalization device;

the digit precharge voltage circuit is coupled to the second line of the local data line pair; and

during a digit precharge operation:

the first line and the second line of the local data line pair are connected together;

the first line and the second line of the local data line pair are connected to the digit line precharge potential; and

the first line and the second line of the local data line pair are connected to the first digit line pair to drive the first digit line pair to the digit line precharge potential.

11 . The apparatus of claim 10 , wherein the digit line precharge potential comprises a midpoint potential relative to a precharge potential of the local data line pair.

12 . The apparatus of claim 10 , wherein the first line of the local data line pair is coupled to first read/write circuity and the second line of the local data line pair is coupled to second read/write circuitry.

13 . The apparatus of claim 12 , further comprising:

a first precharge device coupled to a precharge potential of the local data line pair and coupled between the first line of the local data line pair and the first read/write circuitry; and

a second precharge device coupled to the precharge potential of the local data lie pair and coupled between the second line of the local data line pair and the second read/write circuitry.

14 . The apparatus of claim 10 , wherein:

the digit line pair is a first digit line pair;

the sense amplifier is a first sense amplifier;

the apparatus further comprises a second digit line pair and a second sense amplifier coupled to the second digit line pair; and

the second sense amplifier is configured to selectively connect the second digit line pair to the local data line pair.

15 . The apparatus of claim 14 , wherein the equalization device is shared by the first sense amplifier and the second sense amplifier.

16 . The apparatus of claim 15 , wherein during the digit precharge operation:

the first line and the second line of the local data line pair are connected to the digit line precharge potential; and

the first digit line pair or the second digit line pair or both are connected to the local data line pair to drive the first digit line pair or the second digit line pair or both to the digit line precharge potential.

17 . The apparatus of claim 14 , wherein the first sense amplifier and the second sense amplifier are included n a sense amplifier block.

18 . The apparatus of claim 10 , wherein the equalization device selectively connects the first lie and the second line of the local data line pair based, at least in part, on a state of an equalization control signal provided to the equalization device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2022
From: SCHRECK, JOHN
To: MICRON TECHNOLOGY, INC.
Reel/Frame 058804/0275 →
Continuity (1)
Related Publication 20230238051A1 · Jul 27, 2023
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