Electronic device including a semiconductor layer within a trench and a semiconductor layer and a process of forming the same

1. A process of forming an electronic device, the process comprising:

patterning a substrate to define a trench having a sidewall;

forming a first semiconductor layer within the trench and along the sidewall;

forming a barrier layer within the trench after forming the first semiconductor layer;

forming a second semiconductor layer within the trench after forming the barrier layer, wherein within the trench, first and second portions of the second semiconductor layer contact each other adjacent to a vertical centerline of the trench; and

exposing the second semiconductor layer to radiation sufficient to allow a void within second semiconductor layer to migrate toward the barrier layer.

2. The process of claim 1 , further comprising removing a portion of the first semiconductor layer that overlies a primary surface of the substrate before forming the second semiconductor layer.

3. The process of claim 1 , further comprising diffusing a dopant from the first semiconductor layer into the substrate.

4. The process of claim 1 , further comprising polishing the second semiconductor layer to remove a portion of the second semiconductor layer overlying a primary surface of the substrate.

5. The process of claim 1 , wherein, in a finished electronic device, the process is performed such that the void contacts the barrier layer.

6. The process of claim 1 , further comprising forming a conductive member that electrically connects the first semiconductor layer and the second semiconductor layer to each other.

7. The process of claim 1 , wherein forming the second semiconductor layer includes a semiconductor base material that includes a Group 14 element.

8. The process of claim 1 , wherein patterning the substrate comprises:

(1) etching the substrate to define a portion of the trench including a portion of the sidewall of the trench;

(2) forming a passivation layer along the portion of the sidewall of the trench; and

iterating actions (1) and (2) until a desired depth of the trench is achieved.

9. The process of claim 1 , wherein:

forming the first semiconductor layer comprises depositing a first silicon layer,

the process further comprises etching the first silicon layer, such that the first silicon layer does not overlie a primary surface of the substrate,

forming the barrier layer comprises forming a thermal oxide layer, wherein forming the barrier layer is performed after etching the first silicon layer,

forming the second semiconductor layer comprises depositing a second silicon layer,

exposing the second semiconductor layer to the radiation comprises exposing the second silicon layer to a temperature in a range from 900° C. to 1200° C. for a time period in a range from 10 minutes to 120 minutes, and

the process further comprises polishing to remove the second silicon layer overlying the primary surface.

10. The process of claim 1 , further comprising removing a portion of the second semiconductor layer to form a gate electrode of a transistor.

11. The process of claim 10 , wherein forming the barrier layer comprises forming a dielectric layer.

12. The process of claim 1 , wherein exposing the second semiconductor layer to the radiation comprises exposing the second semiconductor layer to a temperature of at least 600° C. for a time period of at least 5 minutes.

13. The process of claim 12 , wherein the temperature is less than a melting or sublimation point of the second semiconductor layer.

14. The process of claim 12 , wherein the time period is at most 6 hours.

15. A process of forming an electronic device, the process comprising:

patterning a substrate to define a trench having a sidewall;

forming a semiconductor layer within the trench and along the sidewall, wherein the semiconductor layer is an only semiconductor layer formed within the trench;

forming an insulating layer that substantially fills a remaining portion of the trench; and

exposing the semiconductor layer to radiation sufficient to allow self-diffusion of a base semiconductor material within the semiconductor layer,

wherein in a finished electronic device, within the trench, no void is not completely surrounded by the semiconductor layer.

16. An electronic device, comprising:

a substrate that defines a trench having a sidewall;

a first semiconductor layer within the trench and along the sidewall of the trench, wherein the first semiconductor layer is substantially free of any void;

a barrier layer within the trench; and

a second semiconductor layer within the trench, wherein:

the barrier layer is disposed between the first semiconductor layer and the second semiconductor layer,

first and second portions of the second semiconductor layer contact each other at a location closer to a vertical centerline of the trench as compared to the barrier layer, and

a void is within the second semiconductor layer and closer to the barrier layer than the vertical centerline, and, at a particular elevation, a third portion of the second semiconductor layer is disposed between the void and the vertical centerline of the second semiconductor layer.

17. The electronic device of claim 16 , wherein the trench has a first width near a primary surface of the substrate and a second width farther from the primary surface, wherein the first width is less than the second width.

18. The electronic device of claim 16 , wherein the barrier layer includes a first oxide film, a nitride film, and a second oxide film, wherein the nitride film is disposed between the first oxide film and the second oxide film.

19. The electronic device of claim 16 , wherein the first semiconductor layer is a first silicon layer, and the second semiconductor layer is a second silicon layer.

20. The electronic device of claim 19 , further comprising a buried region that contacts the first semiconductor layer or the second semiconductor layer.