Bidirectional variable gain amplifiers for radio frequency communication systems
Bidirectional variable gain amplifiers (VGAs) for radio frequency (RF) communication systems are provided. In certain embodiments, a bidirectional VGA includes a first amplifier having an input coupled to a transmit/receive port, a second amplifier having an output coupled to a transmit port, a third amplifier having an input coupled to a receive port, a fourth amplifier having an output coupled to the transmit/receive port and to the input of the first amplifier, and a switch circuit that connects an output of the first amplifier to an input of the second amplifier in a transmit mode, and that connects an output of the third amplifier to an input of the fourth amplifier in a receive mode.
1. A wireless device comprising:
an antenna array including a plurality of antenna elements;
a plurality of radio frequency signal conditioning circuits each operatively associated with a corresponding one of the plurality of antenna elements and including a bidirectional variable gain amplifier, the bidirectional variable gain amplifier including a first amplifier including an input connected to a transmit/receive port, a second amplifier including an output connected to a transmit port, a third amplifier including an input connected to a receive port, a fourth amplifier including an output connected to the transmit/receive port and to the input of the first amplifier, and a switch circuit configured to connect an output of the first amplifier to an input of the second amplifier in a transmit mode, and to connect an output of the third amplifier to an input of the fourth amplifier in a receive mode, the fourth amplifier being a first common-drain amplifier including a first transistor having a drain connected to a power supply voltage, a gate that is connected to the output of the third amplifier in the receive mode, and a source connected to the input of the first amplifier, the first amplifier including a first pair of input transistors and a second pair of input transistors that are selectable, the first pair of input transistors configured to provide a signal inversion when selected and the second pair of input transistors configured to provide no signal inversion when selected, a first transistor of the first pair of input transistors including a drain connected to a drain of a first transistor of the second pair of input transistors, and a source connected to a source of a second transistor of the second pair of input transistors; and
a transceiver connected to the plurality of radio frequency signal conditioning circuits.
2. The wireless device of claim 1 wherein the first amplifier is a first common-gate amplifier including a second transistor having a source directly connected to the source of the first transistor, a gate connected to a gate bias voltage, and a drain that is connected to the input of the second amplifier in the transmit mode.
3. The wireless device of claim 2 wherein the second amplifier is a second common-gate amplifier, and the third amplifier is a second common-drain amplifier.
4. The wireless device of claim 1 wherein the first amplifier includes a first pair of transistors having a first pair of sources, and the second amplifier includes a second pair of transistors having a second pair of sources directly connected to the first pair of sources.
5. The wireless device of claim 1 wherein the switch circuit includes a first switch and a second switch connected at a common node, the bidirectional variable gain amplifier further including a controllable resistor connected to the common node.
6. The wireless device of claim 1 wherein each of the plurality of radio frequency signal conditioning circuits further includes a phase shifter connected to the transmit/receive port.
7. The wireless device of claim 1 wherein each of the plurality of radio frequency signal conditioning circuits further includes a power amplifier having an input connected to the transmit port and a low noise amplifier having an output connected to the receive port.
8. A bidirectional variable gain amplifier comprising:
a first amplifier including an input connected to a transmit/receive port, the first amplifier including a first pair of input transistors and a second pair of input transistors that are selectable, the first pair of input transistors configured to provide a signal inversion when selected and the second pair of input transistors configured to provide no signal inversion when selected, a first transistor of the first pair of input transistors including a drain connected to a drain of a first transistor of the second pair of input transistors, and a source connected to a source of a second transistor of the second pair of input transistors;
a second amplifier including an output connected to a transmit port;
a third amplifier including an input connected to a receive port;
a fourth amplifier including an output connected to the transmit/receive port and to the input of the first amplifier, the fourth amplifier being a first common-drain amplifier including a first transistor having a drain connected to a power supply voltage, a gate that is connected to the output of the third amplifier in a receive mode, and a source connected to the input of the first amplifier; and
a switch circuit configured to connect an output of the first amplifier to an input of the second amplifier in a transmit mode, and to connect an output of the third amplifier to an input of the fourth amplifier in the receive mode.
9. The bidirectional variable gain amplifier of claim 8 wherein the first amplifier is a first common-gate amplifier including a second transistor having a source directly connected to the source of the first transistor, a gate connected to a gate bias voltage, and a drain that is connected to the input of the second amplifier in the transmit mode.
10. The bidirectional variable gain amplifier of claim 9 wherein the second amplifier is a second common-gate amplifier, and the third amplifier is a second common-drain amplifier.
11. The bidirectional variable gain amplifier of claim 8 wherein the first amplifier includes a first pair of transistors having a first pair of sources, and the second amplifier includes a second pair of transistors having a second pair of sources directly connected to the first pair of sources.
12. The bidirectional variable gain amplifier of claim 11 further comprising a pair of inductors connected to the first pair of sources and the second pair of sources, the pair of inductors configured to provide input matching to the first amplifier and output matching to the fourth amplifier.
13. The bidirectional variable gain amplifier of claim 8 wherein the switch circuit includes a first switch and a second switch connected at a common node.
14. The bidirectional variable gain amplifier of claim 13 further comprising a controllable resistor connected to the common node.
15. The bidirectional variable gain amplifier of claim 8 further comprising a bias and control circuit configured turn off the third amplifier and the fourth amplifier in the transmit mode, and to turn off the first amplifier and the second amplifier in the receive mode.
16. A front end system comprising:
a power amplifier;
a low noise amplifier; and
a bidirectional variable gain amplifier including a first amplifier including an input connected to a transmit/receive port, a second amplifier including an output connected to an input of the power amplifier at a transmit port, a third amplifier including an input connected to an output of the low noise amplifier at a receive port, a fourth amplifier including an output connected to the transmit/receive port and to the input of the first amplifier, and a switch circuit configured to connect an output of the first amplifier to an input of the second amplifier in a transmit mode, and to connect an output of the third amplifier to an input of the fourth amplifier in a receive mode, the fourth amplifier being a first common-drain amplifier including a first transistor having a drain connected to a power supply voltage, a gate that is connected to the output of the third amplifier in the receive mode, and a source connected to the input of the first amplifier, the first amplifier including a first pair of input transistors and a second pair of input transistors that are selectable, the first pair of input transistors configured to provide a signal inversion when selected and the second pair of input transistors configured to provide no signal inversion when selected, a first transistor of the first pair of input transistors including a drain connected to a drain of a first transistor of the second pair of input transistors, and a source connected to a source of a second transistor of the second pair of input transistors.
17. The front end system of claim 16 wherein the first amplifier is a first common-gate amplifier including a second transistor having a source directly connected to the source of the first transistor, a gate connected to a gate bias voltage, and a drain that is connected to the input of the second amplifier in the transmit mode.
18. The front end system of claim 17 wherein the second amplifier is a second common-gate amplifier, and the third amplifier is a second common-drain amplifier.