Granted Patent B2

US 12,242,791 · App. 17/656,759 · Granted Mar 4, 2025

Inventors: Chuanjiang Chen (Hefei, CN); Kang Zhao (Hefei, CN); Li Bai (Hefei, CN); Li Tang (Hefei, CN)

Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.

G06F30/398G06F30/367G06F30/392G06F2119/18

Abstract

Claims (38)

1. A semiconductor integrated circuit design method, wherein the method comprises:

determining, based on an original layout, an original length of an end of a gate structure extending out of an active region in which the gate structure is located;

redetermining, based on a preset rule and the original length, a correction length of the end of the gate structure extending out of the active region in which the gate structure is located; and

integrating the original layout and the correction lengths, and forming an updated layout;

wherein the redetermining, based on a preset rule and the original length, a correction length of the end of the gate structure extending out of the active region in which the gate structure is located comprises:

determining a target gate structure in the gate structure;

determining, based on whether a wiring structure exists at an end of the target gate structure, an end of the target gate structure without the wiring structure as a target extension end, wherein a length of the target extension end extending out of the active region is used as the original length;

determining an extension length of the target extension end based on the preset rule and the original length; and

determining a correction length of the target extension end based on the original length and the extension length of the target extension end;

wherein the determining an extension length of the target extension end based on the preset rule and the original length comprises:

obtaining a first preset length, wherein the first preset length is used to represent a maximum distance by which the end of the gate structure is allowed to extend out of the active region; and

determining that the extension length is less than or equal to a difference between the first preset length and the original length.

2. The method according to claim 1 , wherein the determining a correction length of the target extension end based on the original length and the extension length of the target extension end comprises:

using a sum of the original length and the extension length as the correction length.

3. The method according to claim 1 , wherein the determining an extension length of the target extension end based on the preset rule and the original length comprises:

determining at least one reference gate structure associated with the target gate structure and a reference extension end of the reference gate structure adjacent to the target extension end, wherein the reference extension end is disposed opposite to the target gate structure; and

determining the extension length of the target extension end based on a positional relationship between the target extension end and the reference extension end, the preset rule, and the original length.

4. The method according to claim 3 , wherein when the reference gate structure is a dummy gate, an extension length of the reference extension end is fixed and an extension length of the target gate structure is determined.

5. The method according to claim 3 , wherein the determining the extension length of the target extension end based on a positional relationship between the target extension end and the reference extension end, the preset rule, and the original length comprises:

when the length of the target extension end and a length of the reference extension end extending out of the active region are both the first preset length, determining whether the target extension end overlaps the reference extension end; and

when yes, determining the extension length of the target extension end based on the preset rule and a spacing between the active region in which the target extension end is located and the active region in which the reference extension end is located; or

when no, determining the extension length of the target extension end based on the preset rule, the original length, and a spacing between the target extension end and the reference extension end.

6. The method according to claim 5 , wherein the determining the extension length of the target extension end based on the preset rule and a spacing between the active region in which the target extension end is located and the active region in which the reference extension end is located comprises:

obtaining a distance between opposite sides of the active region in which the target extension end is located and the active region in which the reference extension end is located, and using the distance as the spacing;

obtaining a second preset length, wherein the second preset length is used to represent a minimum distance between ends of two adjacent gate structures along an extending direction of the gate structures; and

using a half of a difference between the spacing and the second preset length as the extension length.

7. The method according to claim 5 , wherein the determining the extension length of the target extension end based on the preset rule, the original length, and a spacing between the target extension end and the reference extension end comprises:

obtaining the spacing between the target extension end and the reference extension end;

obtaining a second preset length, wherein the second preset length is used to represent a minimum distance between ends of two adjacent gate structures along an extending direction of the gate structures; and

determining whether the spacing is greater than or equal to the second preset length; and

when yes, using the difference between the first preset length and the original length as the extension length; or

when no, using a difference between a first difference and a retract distance as the extension length, wherein the first difference is a difference between the first preset length and the original length, and the retract distance is 1%-20% of the first preset length.

8. The method according to claim 3 , wherein when the target gate structure is associated with multiple reference gate structures, the method further comprises:

separately obtaining a connection distance between the target extension end and each of the multiple reference extension ends;

determining multiple candidate lengths based on multiple connection distances; and

determining a minimum value of the multiple candidate lengths as the extension length.

9. The method according to claim 1 , wherein after the integrating the original layout and the correction length, and forming an updated layout, the method further comprises:

performing optical proximity correction (OPC) on the updated layout, and forming a corrected layout.

Assignments (1)

Priority Claims (1)

Continuity (2)

References Cited (30)