IP Library Granted Patent US 12,308,297
Granted Patent B2
US 12,308,297 · App. 17/660,319 · Granted May 20, 2025

Semiconductor package system and related methods

Inventors: Yushuang Yao (Seremban, MY); Chee Chew (Seremban, MY); Atapol Prajuckamol (Rayong, TH)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L23/053H01L21/52H01L23/49811H01L24/49H01L24/85H01L25/0655H01L25/072H01L25/18H01L25/50H01L24/48H01L2224/48091H01L2224/48227H01L2924/00014H01L2924/01014H01L2924/13055H01L2924/13091H01L2924/15738H01L2924/15747
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Quick Facts
Patent No.
US 12,308,297
App. No.
17/660,319
Granted
May 20, 2025
Kind
B2
Abstract

Implementations of a semiconductor package may include: a substrate, a case coupled to the substrate and a plurality of press-fit pins. The press-fit pins are molded into and fixedly coupled with the case. The pins are also electrically and mechanically coupled to the substrate.

Claims (36)

1. A method for making a semiconductor package, the method comprising:

providing a substrate;

coupling one or more die to the substrate using one or more connectors;

providing a case;

molding into the case and fixedly coupling thereto a plurality of pins;

simultaneously electrically and mechanically coupling the plurality of pins and the case with the substrate; and

dispensing a potting compound inside the case over at least a portion of the substrate.

2. The method of claim 1 , wherein the case comprises an opening comprising a strut that extends from a side of the opening to another side of the opening and a first set of a plurality of fingers extending from the strut on one side of the strut and a second set of a plurality of fingers extending from an opposing side of the strut.

3. The method of claim 1 , wherein a cover that has a plurality of openings therethrough configured to receive the plurality of pins is coupled to the case.

4. The method of claim 1 , wherein the substrate comprises at least one of copper, silicon, and any combination thereof.

5. The method of claim 1 , wherein the plurality of pins are fixedly coupled to the substrate through soldering.

6. The method of claim 1 , wherein the one or more connectors comprise a wire.

7. A method for making a semiconductor package, the method comprising:

providing a substrate;

coupling one or more die to the substrate using one or more connectors;

providing a cover for a case, the cover having a potting opening therein;

molding into the cover and fixedly coupling thereto a plurality of pins;

simultaneously electrically and mechanically coupling the plurality of pins and the cover to the substrate;

coupling the case over the cover and to the substrate; and

dispensing a potting compound into the case through the potting opening in the cover.

8. The method of claim 7 , wherein a temporary fixture is used to hold the cover and the substrate together while coupling the plurality of pins and the cover to the substrate.

9. The method of claim 7 , further comprising mechanically and irreversibly locking the cover with the case through a plurality of locking projections on the case.

10. The method of claim 7 , wherein the substrate comprises at least one of copper, silicon, or any combination thereof.

11. The method of claim 7 , wherein the plurality of pins are fixedly coupled to the substrate through soldering.

12. The method of claim 7 , wherein the one or more connectors are made of a wire.

13. A method for making a semiconductor package, the method comprising:

providing a substrate;

coupling one or more die to the substrate using one or more connectors; and

simultaneously coupling one of a plurality of pins and a cover to the substrate or the plurality of pins and a case to the substrate.

14. The method of claim 13 , further comprising dispensing a potting compound into the case through a potting opening in the cover.

15. The method of claim 13 , further comprising molding the plurality of pins into one of the cover or the case.

16. The method of claim 13 , wherein the plurality of pins extend through a plurality of openings comprised in the cover.

17. The method of claim 13 , further comprising mechanically and irreversibly locking the cover with the case through a plurality of locking projections on the case.

18. The method of claim 13 , wherein the plurality of pins is fixedly coupled to one of the case or the cover prior to coupling the plurality of pins to the substrate.

19. The method of claim 13 , wherein the substrate comprises of at least one of copper, silicon, and any combination thereof.

20. The method of claim 13 , wherein the one or more connectors comprise a wire.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS, RECORDED AT REEL 061071, FRAME 052 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, AS GRANTOR; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC., AS GRANTOR
Reel/Frame 064067/0654 →
SECURITY INTEREST Recorded Aug 4, 2022
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 061071/0525 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 22, 2022
From: YAO, YUSHUANG; CHEW, CHEE HIONG; PRAJUCKAMOL, ATAPOL
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 059683/0617 →
Continuity (3)
Division 15136605 · Apr 22, 2016
Provisional Application 62267349 · Dec 15, 2015
Related Publication 20220246486A1 · Aug 4, 2022
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