Process of forming an electronic device including a polymer support layer
A process can be used to allow processing of thin layers of a workpiece including dies. The workpiece can include a base substrate and a plurality of layers overlying the base substrate. The process can include forming a polymer support layer over the plurality of layers; thinning or removing the base substrate within a component region of the workpiece, wherein the component region includes an electronic device; and singulating the workpiece into a plurality of dies after thinning or removing the base substrate. In another aspect, an electronic device can be formed using such process. In an embodiment, the workpiece may have a size corresponding to a semiconductor wafer to allow wafer-level, as opposed to die-level, processing.
1. A process comprising:
providing a workpiece having a first major surface and a second major surface opposite the first major surface, wherein the workpiece includes a base substrate and a plurality of layers overlying the base substrate, and the plurality of layers is closer to the first major surface than to the second major surface;
removing a portion of the plurality of layers to define a trench that is adjacent to the first major surface and extends through the plurality of layers and extends at least to the base substrate;
forming a polymer support layer along the first major surface of the workpiece and within the trench;
removing a portion of the base substrate along the second major surface of the workpiece, wherein removing the portion of the base substrate exposes raised portions of the polymer support layer and forms a remaining portion of the base substrate;
forming an electrically conductive layer that contacts the remaining portion of the base substrate and the raised portions of the polymer support layer; and
removing a portion of the electrically conductive layer and parts of the raised portions of the polymer support layer, wherein remaining portions of the electrically conductive layer are spaced apart from each other by remaining parts of the raised portions of the polymer support layer, and, after removing the portion of the electrically conductive layer, the remaining portions of the electrically conductive layer contact the remaining parts of the raised portions of the polymer support layer.
2. The process of claim 1 , wherein after removing the portion of the base substrate, an exposed surface of the remaining portion of the base substrate is recessed to an elevation below an elevation of a distal surface of raised portions of the polymer support layer.
3. The process of claim 1 , wherein forming the electrically conductive layer is performed such that the electrically conductive layer is formed over the raised portions of the polymer support layer.
4. The process of claim 3 , wherein removing portions of the electrically conductive layer and parts of the raised portions of the polymer support layer is performed using a grinding, planing or polishing technique.
5. The process of claim 1 , wherein forming the electrically conductive layer comprises plating or depositing by physical vapor deposition the electrically conductive layer.
6. The process of claim 1 , further comprising singulating the workpiece after removing the portion of the electrically conductive layer.
7. The process of claim 1 , further comprising singulating the workpiece along a scribe lane to form a die that includes a component region that includes the plurality of layers, wherein singulating is performed while a portion of the electrically conductive layer is along the raised portions of the polymer support layer.
8. The process of claim 1 , further comprising forming a spacer structure along the first major surface of the workpiece before forming the polymer support layer.
9. The process of claim 8 , wherein forming the spacer structure comprises forming an electrically conductive member.
10. The process of claim 8 , further comprising removing a first major surface portion of the polymer support layer along the first major surface to expose the spacer structure.
11. The process of claim 10 , wherein removing the first major surface portion of the polymer support layer is performed after forming the electrically conductive layer.
12. The process of claim 1 , wherein the base substrate includes a semiconductor wafer.
13. The process of claim 1 , wherein the plurality of layers comprise a device section, wherein the device section includes an epitaxial layer, a well region, or an electronic component within the epitaxial layer or the well region.
14. A process comprising:
providing a workpiece having a first major surface and a second major surface opposite the first major surface, wherein the workpiece includes a base substrate and a plurality of layers overlying the base substrate, and the plurality of layers is closer to the first major surface than to the second major surface;
removing a portion of the plurality of layers to define a first trench adjacent to the first major surface and extending through the plurality of layers and at least to the base substrate;
forming a polymer support layer along the first major surface of the workpiece and within the first trench;
forming a patterned masking layer along the second major surface and over the base substrate;
etching the base substrate to define second trenches adjacent to the second major surface and extending into the base substrate; and
forming an electrically conductive layer that extends into the second trenches in the base substrate,
wherein:
after forming the electrically conductive laver, the electrically conductive layer contacts portions of the base substrate that are disposed between the plurality of layers and bottoms of the second trenches within the base substrate, and
etching the base substrate and forming the electrically conductive layer are performed after forming the polymer support laver.
15. The process of claim 14 , wherein forming the electrically conductive layer is performed such that the electrically conductive layer contacts sidewalls of the second trenches in the base substrate.
16. The process of claim 14 , further comprising removing the patterned masking layer after etching the base substrate and before forming the electrically conductive layer.
17. A process comprising:
providing a workpiece having a first major surface and a second major surface opposite the first major surface, wherein the workpiece includes a base substrate and a plurality of layers including a device section, and wherein the plurality of layers is disposed between the base substrate and the first major surface, and the plurality of layers is closer to the first major surface than the second major surface;
removing a portion of the plurality of layers to define a trench that is adjacent to the first major surface and extends through the plurality of layers;
forming a polymer support layer along the first major surface of the workpiece and within the trench;
removing the base substrate within a component region of the workpiece, wherein, after removing the base substrate, a distal surface of the polymer support layer and the plurality of layers are exposed along the second major surface of the workpiece; and
forming an electrically conductive layer along the second major surface of the workpiece, wherein the electrically conductive layer contacts the plurality of layers and is electrically connected to the device section.
18. The process of claim 17 , wherein:
the plurality of layers further comprises a sacrificial layer disposed between the base substrate and the device section; and
removing the base substrate is performed such that the sacrificial layer becomes exposed along the second major surface.
19. The process of claim 18 , further comprising removing the sacrificial layer to expose the device section, wherein forming the electrically conductive layer is performed such that the electrically conductive layer contacts the device section.
20. The process of claim 17 , wherein removing the base substrate comprises removing all of the base substrate.