IP Library Granted Patent US 11,599,210
Granted Patent B2
US 11,599,210 · App. 17/671,768 · Granted Mar 7, 2023

Electronic devices having bilayer capping layers and/or barrier layers

Inventors: Helia Jalili (Arlington, MA); Francois Dary (Newton, MA); Barbara Cox (Norwood, MA)
Assignee: Materion Newton, Inc.
G06F3/041C25D11/022G02F1/13338G02F1/136286H01L21/76841H01L23/53223H01L23/53238H01L23/53252H01L23/53266H01L27/156G02F1/13629G02F1/136295G06F2203/04103
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Quick Facts
Patent No.
US 11,599,210
App. No.
17/671,768
Granted
Mar 7, 2023
Kind
B2
Abstract

In various embodiments, electronic devices such as thin-film transistors and/or touch-panel displays incorporate bilayer capping layers and/or barrier layers.

Claims (29)

1. An electronic device comprising:

a substrate; and

a conductive feature disposed over the substrate, the conductive feature comprising:

(a) disposed over the substrate, a conductor layer comprising at least one of Cu, Ag, Al, or Au, and

(b) disposed over the conductor layer, a bilayer capping layer comprising a base layer and a dielectric layer disposed thereover, wherein (i) the base layer comprises an alloy of Cu and/or Mo with 0.5 weight %-50 weight % of one or more anodizable alloying elements selected from the list consisting of Ta, Nb, Al, Hf, Zr, Ti, and Mg, and (ii) the dielectric layer comprises an oxide, nitride, or oxynitride of the one or more anodizable alloying elements.

2. The electronic device of claim 1 , wherein the substrate comprises glass.

3. The electronic device of claim 1 , wherein the substrate comprises silicon.

4. The electronic device of claim 3 , wherein the substrate comprises amorphous silicon.

5. The electronic device of claim 1 , wherein the base layer comprises an alloy of (i) Mo and Nb, (ii) Mo, Ta, and Nb, (iii) Mo, Nb, and Ti, (iv) Mo and Ti, or (v) Mo, Nb, and Zr.

6. The electronic device of claim 1 , wherein tithe base layer comprises an alloy of Cu, Ta, and Zr, and (ii) the base layer is substantially free of Mo.

7. The electronic device of claim 1 , wherein the dielectric layer is substantially free of Cu and/or Mo.

8. The electronic device of claim 1 , wherein the base layer comprises:

an interfacial portion disposed beneath and in contact with the dielectric layer; and

a bottom portion disposed beneath the interfacial portion.

9. The electronic device of claim 8 , wherein a concentration of at least one of the one or more anodizable alloying elements within the interfacial portion is less than a concentration of at least one of the one or more anodizable alloying elements within the bottom portion.

10. The electronic device of claim 8 , wherein the interfacial portion is substantially free of at least one of the one or more anodizable alloying elements.

11. The electronic device of claim 8 , wherein the interfacial portion is substantially free of all of said one or more anodizable alloying elements.

12. The electronic device of claim 1 , wherein the conductive feature comprises an electrode.

13. The electronic device of claim 1 , wherein the conductive feature comprises an interconnect.

14. The electronic device of claim 13 , wherein the conductive feature is electrically coupled to a conductive sensor.

15. The electronic device of claim 14 , wherein the conductive sensor comprises a substantially transparent conductive material.

16. The electronic device of claim 14 , wherein the conductive sensor comprises indium tin oxide.

17. The electronic device of claim 1 , wherein tithe base layer comprises an alloy of Mo with 0.5 weight %-50 weight % of one or more anodizable alloying elements selected from the list consisting of Ta, Nb, Al, Hf, Zr, Ti, and Mg, and (ii) the base layer is substantially free of Cu.

18. The electronic device of claim 1 , wherein tithe base layer comprises an alloy of Cu with 0.5 weight %-50 weight % of one or more anodizable alloying elements selected from the list consisting of Ta, Nb, Al, Hf, Zr, Ti, and Mg, and (ii) the base layer is substantially free of Cu.

19. The electronic device of claim 1 , wherein (i) the base layer comprises an alloy of Mo and Nb, and (ii) the base layer is substantially free of Cu.

20. The electronic device of claim 1 , wherein (i) the base layer comprises an alloy of Mo, Ta, and Nb, and (ii) the base layer is substantially free of Cu.

21. The electronic device of claim 1 , wherein (i) the base layer comprises an alloy of Mo, Nb, and Ti, and (ii) the base layer is substantially free of Cu.

22. The electronic device of claim 1 , wherein (i) the base layer comprises an alloy of Mo and Ti, and (ii) the base layer is substantially free of Cu.

23. The electronic device of claim 1 , wherein (i) the base layer comprises an alloy of Mo, Nb, and Zr, and (ii) the base layer is substantially free of Cu.

Assignments (3)
CONFIRMATORY GRANT OF SECURITY INTEREST IN UNITED STATES PATENTS Recorded Jun 26, 2025
From: MATERION NEWTON INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 071751/0100 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2022
From: JALILI, HELIA; DARY, FRANCOIS; COX, BARBARA
To: H.C. STARCK INC.
Reel/Frame 061543/0149 →
CHANGE OF NAME Recorded Oct 26, 2022
From: H.C. STARCK INC.
To: MATERION NEWTON INC.
Reel/Frame 061783/0892 →
Continuity (7)
Continuation 17102732 · Nov 24, 2020
Continuation 16733412 · Jan 3, 2020
Continuation 16512574 · Jul 16, 2019
Continuation 15873969 · Jan 18, 2018
Provisional Application 62535403 · Jul 21, 2017
Provisional Application 62448137 · Jan 19, 2017
Related Publication 20220221950A1 · Jul 14, 2022