Method for preparing semiconductor device structure with manganese-containing lining layer

1. A method for preparing a semiconductor device structure, comprising:

forming a first conductive layer over a semiconductor substrate, wherein the first conductive layer comprises copper (Cu);

forming a first dielectric layer over the first conductive layer;

etching the first dielectric layer to form a first opening exposing the first conductive layer;

forming a first lining layer and a first conductive plug in the first opening, wherein the first lining layer comprises manganese (Mn), the first conductive plug comprises copper (Cu), and the first conductive plug is surrounded by the first lining layer;

forming a second conductive layer over the first dielectric layer, the first lining layer and the first conductive layer, wherein the second conductive layer comprises copper (Cu); and

forming an energy removable layer lining the first opening before the first lining layer and the first conductive plug are formed, wherein the first conductive layer is partially exposed after the energy removable layer is formed.

2. The method for preparing a semiconductor device structure of claim 1 , further comprising:

performing a heat treatment process to transform the energy removable layer into an air gap after the second conductive layer is formed.

3. The method for preparing a semiconductor device structure of claim 1 , further comprising:

forming a second dielectric layer over the second conductive layer;

etching the second dielectric layer to form a second opening exposing the second conductive layer;

forming a second lining layer and a second conductive plug in the second opening, wherein the second conductive plug is surrounded by the second lining layer, the second lining layer comprises manganese (Mn), and the second conductive plug comprises copper (Cu); and

forming a third conductive layer to cover the second lining layer and the second conductive plug.

4. The method for preparing a semiconductor device structure of claim 3 , wherein the first conductive plug and the second conductive plug each further comprise tungsten (W).

5. The method for preparing a semiconductor device structure of claim 3 , wherein the third conductive layer is separated from the second dielectric layer by the second lining layer, and a portion of the second lining layer is sandwiched between the second conductive plug and the second conductive layer.

6. The method for preparing a semiconductor device structure of claim 3 , wherein forming the second lining layer comprises:

forming a first sub-lining layer over a top surface of the second dielectric layer, wherein sidewalls and a bottom surface of the second opening are covered by the first sub-lining layer, and wherein the first sub-lining layer comprises manganese silicon (MnSi);

forming a second sub-lining layer over the first sub-lining layer, wherein the second sub-lining layer comprises manganese (Mn); and

forming a third sub-lining layer over the second sub-lining layer, wherein the third sub-lining layer comprises copper manganese (CuMn).

7. The method for preparing a semiconductor device structure of claim 6 , wherein the second lining layer comprises copper-manganese-silicon (CuMnSi).

8. A method for preparing a semiconductor device structure, comprising:

forming a first conductive layer over a semiconductor substrate;

forming a first dielectric layer over the first conductive layer;

forming a second conductive layer over the first dielectric layer;

forming a second dielectric layer over the second conductive layer;

forming a third conductive layer over the second dielectric layer;

forming a first conductive plug penetrating through the first dielectric layer and electrically connecting the first conductive layer to the second conductive layer, wherein the first conductive plug comprises copper (Cu);

forming a first lining layer between the first conductive plug and the first dielectric layer, wherein the first lining layer comprises manganese (Mn);

forming a second conductive plug in the second dielectric layer, wherein the second conductive plug electrically connects the second conductive layer to the third conductive layer, and wherein the second conductive plug comprises copper (Cu); and

forming a second lining layer between the second conductive plug and the second dielectric layer, wherein the second lining layer comprises manganese (Mn), wherein the first conductive plug and the second conductive plug are in a pattern-dense region, and an air gap is between the first lining layer and the first dielectric layer.

9. The method for preparing a semiconductor device structure of claim 8 , wherein at least one of the first conductive plug and the second conductive plug further comprises tungsten (W).

10. The method for preparing a semiconductor device structure of claim 8 , further comprising:

forming a third conductive plug in the second dielectric layer and in a pattern-loose region, wherein the third conductive plug electrically connects the second conductive layer to the third conductive layer, and the third conductive plug comprises copper (Cu), and

wherein the third conductive plug is separated from the second dielectric layer by the second lining layer, and a height of the third conductive plug is greater than a height of the second conductive plug.

11. The method for preparing a semiconductor device structure of claim 8 , wherein a width of the third conductive plug is greater than a width of the second conductive plug.

12. The method for preparing a semiconductor device structure of claim 8 , wherein the second lining layer comprises:

forming a first sub-lining layer over and directly contacting the second conductive layer, wherein the first sub-lining layer comprises manganese (Mn) or manganese silicon (MnSi); and

forming a second sub-lining layer over the first sub-lining layer, wherein the second sub-lining layer is in direct contact with the second conductive plug, the third conductive plug and the third conductive layer, wherein the second sub-lining layer comprises copper manganese (CuMn).

13. The method for preparing a semiconductor device structure of claim 12 , wherein the second lining layer comprises copper-manganese-silicon (CuMnSi).