Contact via formation

1. A semiconductor structure, comprising:

a first dielectric feature and a second dielectric feature;

a source/drain contact structure comprising a base portion sandwiched between the first dielectric feature and the second dielectric feature along a first direction and a via portion disposed over the base portion and tapering away from a top surface of the base portion; and

a dielectric layer disposed between the via portion and the first dielectric feature as well as between the via portion and the second dielectric feature along the first direction.

2. The semiconductor structure of claim 1 , wherein the via portion and the base portion are continuous and free of any intervening layer in between.

3. The semiconductor structure of claim 1 , wherein the source/drain contact structure comprises cobalt (Co), tungsten (W), ruthenium (Ru), aluminum (Al), molybdenum (Mo), titanium (Ti), titanium nitride (TiN), titanium silicide (TiSi), cobalt silicide (CoSi), nickel silicide (NiSi), copper (Cu), tantalum nitride (TaN), nickel (Ni), or titanium silicide nitride (TiSiN).

4. The semiconductor structure of claim 1 , further comprising:

a glue layer disposed between the base portion and the first dielectric feature as well as between the base portion and the second dielectric feature along the first direction,

wherein a composition of the glue layer is different from a composition of the source/drain contact structure.

5. The semiconductor structure of claim 1 , further comprising:

a liner disposed between the dielectric layer and the source/drain contact structure.

6. The semiconductor structure of claim 5 , wherein the liner comprises cobalt (Co), tungsten (W), ruthenium (Ru), molybdenum (Mo), titanium (Ti), titanium nitride (TiN), titanium silicide (TiSi), cobalt silicide (CoSi), nickel silicide (CiSi), tantalum nitride (TaN), nickel (Ni), or titanium silicide nitride (TiSiN).

7. The semiconductor structure of claim 5 , wherein the liner also extends between the dielectric layer and the first dielectric feature as well as between the dielectric layer and the second dielectric feature.

8. The semiconductor structure of claim 1 , wherein a top surface of the via portion extends above a top surface of the dielectric layer.

9. The semiconductor structure of claim 8 , wherein, from a top view, the via portion comprises an oval shape.

10. A semiconductor structure, comprising:

an active region extending along a first direction and comprising a source/drain region;

a source/drain contact structure over the source/drain region, the source/drain contact structure comprising:

a base portion extending lengthwise along a second direction perpendicular to the first direction, and

a via portion over the base portion, wherein the via portion tapers away from the base portion; and

a first dielectric feature and a second dielectric feature,

wherein the base portion is sandwiched between the first dielectric feature and the second dielectric feature along the second direction,

wherein top surfaces of the via portion, the first dielectric feature and the second dielectric feature are coplanar.

11. The semiconductor structure of claim 10 , wherein the active region comprises a fin structure.

12. The semiconductor structure of claim 10 , wherein the active region comprises a vertical stack of nanostructures.

13. The semiconductor structure of claim 10 , further comprising:

a first gate structure disposed over a first channel region adjacent the source/drain region;

a second gate structure disposed over a second channel region adjacent the source/drain region such that the source/drain region is sandwiched between the first channel region and the second channel region along the first direction;

a first gate spacer disposed along a sidewall of the first gate structure; and

a second gate spacer disposed along a sidewall of the second gate structure,

wherein the base portion is sandwiched between the first gate spacer and the second gate spacer along the first direction.

14. The semiconductor structure of claim 13 , further comprising:

a glue layer disposed between the base portion and the first gate spacer as well as between the base portion and the second gate spacer.

15. The semiconductor structure of claim 10 , further comprising:

a dielectric layer disposed between the via portion and the first dielectric feature along the second direction and between the via portion and the second dielectric feature along the second direction.

16. The semiconductor structure of claim 15 , further comprising:

a liner disposed between the dielectric layer and a top surface of the base portion.

17. A semiconductor structure, comprising:

a first dielectric feature and a second dielectric feature;

a contact structure comprising a base portion sandwiched between the first dielectric feature and the second dielectric feature along a first direction and a via portion protruding from a top surface of the base portion; and

a dielectric layer disposed between the via portion and the first dielectric feature as well as between the via portion and the second dielectric feature along the first direction,

wherein, along the first direction, the via portion comprises a first width at an junction between the base portion and the via portion and a second width at a top surface of the dielectric layer,

wherein the first width is greater than the second width.

18. The semiconductor structure of claim 17 , further comprising:

a glue layer disposed between the base portion and the first dielectric feature as well as between the base portion and the second dielectric feature along the first direction,

wherein a composition of the glue layer is different from a composition of the contact structure.

19. The semiconductor structure of claim 17 , further comprising:

a liner disposed between the dielectric layer and the contact structure.

20. The semiconductor structure of claim 19 , wherein the liner comprises a thickness between about 0.5 nm and about 5 nm.