IP Library › Granted Patent US 12,167,595
Granted Patent B2
US 12,167,595 · App. 17/682,976 · Granted Dec 10, 2024

Semiconductor device and method of manufacturing the same

Inventor: Shinya Okuda (Mie, JP)
Assignee: KIOXIA CORPORATION
H10B43/20H10B41/10H10B41/20H10B43/10H10B43/27H10B43/50
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,167,595
App. No.
17/682,976
Granted
Dec 10, 2024
Kind
B2
Abstract

A semiconductor device includes a stacked film including a plurality of electrode layers and a plurality of insulating layers alternately stacked in a first direction and a columnar portion including a charge storage layer and a first semiconductor layer and extending in the first direction in the stacked film. The device further includes a second semiconductor layer provided on the stacked film and the columnar portion, and at least a part of regions in the second semiconductor layer contains phosphorus having an atomic concentration of 1.0×10 21 /cm 3 or more and hydrogen having an atomic concentration of 1.0×10 19 /cm 3 or less.

Claims (23)

1. A semiconductor device comprising:

a stacked film including a plurality of electrode layers and a plurality of insulating layers alternately stacked in a first direction;

a columnar portion including a charge storage layer and a first semiconductor layer, the columnar portion extending in the first direction in the stacked film; and

a second semiconductor layer disposed on the stacked film and the columnar portion,

wherein at least a part of regions in the second semiconductor layer contains phosphorus having an atomic concentration of 1.0×10 21 /cm 3 or more and hydrogen having an atomic concentration of 1.0×10 19 /cm 3 or less.

2. The semiconductor device according to claim 1 , wherein the at least a part of regions in the second semiconductor layer is a polycrystalline semiconductor layer.

3. The semiconductor device according to claim 1 , wherein the second semiconductor layer includes a first region that is a polycrystalline semiconductor layer and a second region that is an amorphous semiconductor layer.

4. The semiconductor device according to claim 3 , wherein an atomic concentration of phosphorus in the first region is 1.0×10 21 /cm 3 or more, and an atomic concentration of hydrogen in the first region is 1.0×10 19 /cm 3 or less.

5. The semiconductor device according to claim 3 , wherein an atomic concentration of hydrogen in the second region is higher than 1.0×10 19 /cm 3 .

6. The semiconductor device according to claim 1 , wherein

the plurality of electrode layers and the plurality of insulating layers are alternately disposed on a first substrate, and

an atomic concentration of hydrogen in the second semiconductor layer is 1.0×10 19 /cm 3 or less in at least a portion of a side surface of the second semiconductor layer positioned above an end surface of the first substrate.

7. The semiconductor device according to claim 6 , wherein the at least a portion of the side surface of the second semiconductor layer is a polycrystalline semiconductor layer.

8. The semiconductor device according to claim 1 , wherein

the plurality of electrode layers and the plurality of insulating layers are alternately disposed on a first substrate, and

an atomic concentration of hydrogen in the second semiconductor layer is higher than 1.0×10 19 /cm 3 in at least a portion of a side surface of the second semiconductor layer positioned above an end surface of the first substrate.

9. The semiconductor device according to claim 8 , wherein the at least a portion of the side surface of the second semiconductor layer is an amorphous semiconductor layer.

10. The semiconductor device according to claim 1 , further comprising:

a first substrate;

a first pad disposed above the first substrate; and

a second pad disposed on the first pad,

wherein the first semiconductor layer is disposed at a position higher than the second pad and is electrically connected to the second pad.

11. The semiconductor device according to claim 1 , wherein the plurality of electrode layers is a plurality of word lines, and the second semiconductor layer is a source line.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2022
From: OKUDA, SHINYA
To: KIOXIA CORPORATION
Reel/Frame 059122/0799 →
Priority Claims (1)
JP 2021-102722 · Jun 21, 2021 · national
Continuity (1)
Related Publication 20220406810A1 · Dec 22, 2022