IP Library Granted Patent US 11,791,935
Granted Patent B2
US 11,791,935 · App. 17/686,015 · Granted Oct 17, 2023

Data transmission method and apparatus

Inventors: Seunggye Hwang (Seoul, KR); Kijun Kim (Seoul, KR); Soocheol Kyeong (Seoul, KR); Bonghoe Kim (Seoul, KR); Jinwoo Kim (Seoul, KR); Kwangseok Noh (Seoul, KR); Jongwoong Shin (Seoul, KR); Joonkui Ahn (Seoul, KR); Hyangsun You (Seoul, KR)
Assignee: LG Electronics Inc.
H04L1/0063H03M13/13H04L1/00H04L1/005H04L1/0052
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Quick Facts
Patent No.
US 11,791,935
App. No.
17/686,015
Granted
Oct 17, 2023
Kind
B2
Abstract

A disclosure of the present specification provides a method for transmitting data by a transmitter. The method may comprise the steps of: when a transport block (TB) is divided into n data blocks, adding additional information after each of the n data blocks; and adding a cyclic redundancy check (CRC) after the last additional information. Here, the CRC may be generated on the basis of the n data blocks, and the n pieces of additional information added after each of data blocks.

Claims (62)

1. A transmitting device comprising:

at least one transceiver; and

at least one processor; and

at least one memory operably connectable to the at least one processor and storing instructions that, when executed by the at least one processor, perform operations comprising:

generating, based on data, an information bit sequence input for a polar code; and

performing channel-encoding for the information bit sequence based on the polar code,

wherein the information bit sequence includes data blocks 0 to N−1 related to the data and parity blocks 0 to N−1 in the order of data block 0, parity block 0, data block 1, parity block 1, . . . , data block N−1, parity block N−1, where N is an integer larger than 1, and

wherein each parity block n of the parity blocks 0 to N−1 is generated based on bits included in data blocks 0 to n−1 and bits included in data block n only, among the data blocks 0 to N−1.

2. The transmitting device according to claim 1 ,

wherein the data includes the data blocks 0 to N−1.

3. The transmitting device according to claim 1 ,

wherein each parity block n of the parity blocks 0 to N−1 includes at least one cyclic redundancy check (CRC) bit.

4. The transmitting device according to claim 1 ,

wherein each parity block n of the parity blocks 0 to N−1 is a single parity bit, and

wherein the information bit sequence further includes a cyclic redundancy check (CRC) block at an end of the information bit sequence.

5. The transmitting device according to claim 1 ,

wherein each parity block n of the parity blocks 0 to N−1 includes no parity bit which is generated based on parity blocks 0 to n−1, parity blocks n+1 to N−1, and data blocks n+1 to N−1.

6. A method of performing channel-coding at a transmitting device, the method comprising:

generating, based on data, an information bit sequence input for a polar code; and

performing channel-encoding for the information bit sequence based on the polar code,

wherein the information bit sequence includes data blocks 0 to N−1 related to the data and parity blocks 0 to N−1 in the order of data block 0, parity block 0, data block 1, parity block 1, . . . , data block N−1, parity block N−1, where N is an integer larger than 1, and

wherein each parity block n of the parity blocks 0 to N−1 is generated based on bits included in data blocks 0 to n−1 and bits included in data block n only, among the data blocks 0 to N−1.

7. The method according to claim 6 ,

wherein the data includes the data blocks 0 to N−1.

8. The method according to claim 6 ,

wherein each parity block n of the parity blocks 0 to N−1 includes at least one cyclic redundancy check (CRC) bit.

9. The method according to claim 6 ,

wherein each parity block n of the parity blocks 0 to N−1 is a single parity bit, and

wherein the information bit sequence further includes a cyclic redundancy check (CRC) block at an end of the information bit sequence.

10. The method according to claim 6 ,

wherein each parity block n of the parity blocks 0 to N−1 includes no parity bit which is generated based on parity blocks 0 to n−1, parity blocks n+1 to N−1, and data blocks n+1 to N−1.

11. A receiving device comprising:

at least one transceiver;

at least one processor; and

at least one computer memory operably connectable to the at least one processor and storing instructions that, when executed by the at least one processor, perform operations comprising:

receiving an encoded information bit sequence related to data; and

performing channel-decoding on the encoded information bit sequence based on a polar code to obtain an information bit sequence,

wherein the information bit sequence includes data blocks 0 to N−1 related to the data and parity blocks 0 to N−1 in the order of data block 0, parity block 0, data block 1, parity block 1, . . . , data block N−1, parity block N−1, where N is an integer larger than 1, and

wherein each parity block n of the parity blocks 0 to N−1 is related to bits included in data blocks 0 to n−1 and bits included in data block n only, among the data blocks 0 to N−1.

12. The receiving device according to claim 11 ,

wherein the data includes the data blocks 0 to N−1.

13. The receiving device according to claim 11 ,

wherein each parity block n of the parity blocks 0 to N−1 includes at least one cyclic redundancy check (CRC) bit.

14. The decoding receiving device according to claim 11 ,

wherein each parity block n of the parity blocks 0 to N−1 is a single parity bit, and

wherein the information bit sequence further includes a cyclic redundancy check (CRC) block at an end of the information bit sequence.

15. The receiving device according to claim 11 ,

wherein each parity block n of the parity blocks 0 to N−1 includes no parity bit which is related to parity blocks 0 to n−1, parity blocks n+1 to N−1, and data blocks n+1 to N−1.

16. A method of performing channel-decoding at a receiving device, the method comprising:

receiving an encoded information bit sequence related to data; and

performing decoding on the encoded information bit sequence based on a polar code to obtain an information bit sequence,

wherein the information bit sequence includes data blocks 0 to N−1 related to the data and parity blocks 0 to N−1 in the order of data block 0, parity block 0, data block 1, parity block 1, . . . , data block N−1, parity block N−1, where N is an integer larger than 1, and

wherein each parity block n of the parity blocks 0 to N−1 is related to bits included in data blocks 0 to n−1 and bits included in data block n only, among the data blocks 0 to N−1.

17. The method according to claim 16 ,

wherein the data includes the data blocks 0 to N−1.

18. The method according to claim 16 ,

wherein each parity block n of the parity blocks 0 to N−1 includes at least one cyclic redundancy check (CRC) bit.

19. The method according to claim 16 ,

wherein each parity block n of the parity blocks 0 to N−1 is a single parity bit, and

wherein the information bit sequence further includes a cyclic redundancy check (CRC) block at an end of the information bit sequence.

20. The method according to claim 16 ,

wherein each parity block n of the parity blocks 0 to N−1 includes no parity bit which is related to parity blocks 0 to n−1, parity blocks n+1 to N−1, and data blocks n+1 to N−1.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 19, 2022
From: HWANG, SEUNGGYE; KIM, KIJUN; KYEONG, SOOCHEOL; KIM, BONGHOE; KIM, JINWOO; NOH, KWANGSEOK; SHIN, JONGWOONG; AHN, JOONKUI; YOU, HYANGSUN
To: LG ELECTRONICS INC.
Reel/Frame 059960/0704 →
Continuity (6)
Continuation 16806452 · Mar 2, 2020
Continuation 16263616 · Jan 31, 2019
Continuation 16065504
Provisional Application 62401842 · Sep 29, 2016
Provisional Application 62352013 · Jun 19, 2016
Related Publication 20220190959A1 · Jun 16, 2022