IP Library Granted Patent US 11,757,016
Granted Patent B2
US 11,757,016 · App. 17/709,385 · Granted Sep 12, 2023

Semiconductor device and method for fabricating the same

Inventors: Yi-Fan Li (Tainan, TW); Wen-Yen Huang (Changhua County, TW); Shih-Min Chou (Tainan, TW); Zhen Wu (Kaohsiung, TW); Nien-Ting Ho (Tainan, TW); Chih-Chiang Wu (Tainan, TW); Ti-Bin Chen (Tainan, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L29/4966H01L27/092H01L29/401
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Quick Facts
Patent No.
US 11,757,016
App. No.
17/709,385
Granted
Sep 12, 2023
Kind
B2
Abstract

A method for fabricating semiconductor device includes the steps of first providing a substrate having a first region and a second region, forming a first bottom barrier metal (BBM) layer on the first region and the second region, forming a first work function metal (WFM) layer on the first BBM layer on the first region and the second region, and then forming a diffusion barrier layer on the first WFM layer.

Claims (26)

1. A semiconductor device, comprising:

a substrate having a first region and a second region;

a gate structure on the first region and the second region of the substrate, wherein the gate structure comprises:

a first bottom barrier metal (BBM) layer on the first region and the second region;

a first work function metal (WFM) layer on the first region;

a diffusion barrier layer on the first WFM layer; and

a second WFM layer on a top surface and a sidewall of the diffusion barrier layer.

2. The semiconductor device of claim 1 , further comprising a low resistance metal layer on the second WFM layer.

3. The semiconductor device of claim 1 , wherein the first WFM layer comprises a p-type WFM layer and the second WFM layer comprises a n-type WFM layer.

4. The semiconductor device of claim 1 , wherein the first BBM layer and the diffusion barrier layer comprise a same material.

5. The semiconductor device of claim 1 , further comprising a second BBM layer between the first BBM layer and the substrate.

6. The semiconductor device of claim 5 , wherein the first BBM layer and the second BBM layer comprise different materials.

7. A semiconductor device, comprising:

a substrate having a first region and a second region;

a gate structure on the first region and the second region of the substrate, wherein the gate structure comprises:

a first bottom barrier metal (BBM) layer on the first region and the second region, wherein a thickness of the first BBM layer on the second region is less than a thickness of the first BBM layer on the first region;

a first work function metal (WFM) layer on the first region; and

a diffusion barrier layer contacts a surface of the first WFM layer on the first region and the first BBM layer on the second region.

8. The semiconductor device of claim 7 , further comprising:

a second WFM layer on the diffusion barrier layer; and

a low resistance metal layer on the second WFM layer.

9. The semiconductor device of claim 8 , wherein the first WFM layer comprises a p-type WFM layer and the second WFM layer comprises a n-type WFM layer.

10. The semiconductor device of claim 7 , wherein a thickness of the first BBM layer on the first region is equal to a combined thickness of the first BBM layer and the diffusion barrier layer on the second region.

11. The semiconductor device of claim 7 , wherein the first BBM layer and the diffusion barrier layer comprise a same material.

12. The semiconductor device of claim 7 , further comprising a second BBM layer between the first BBM layer and the substrate.

13. The semiconductor device of claim 12 , wherein the first BBM layer and the second BBM layer comprise different materials.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 1, 2025
From: UNITED MICROELECTRONICS CORP.
To: STELLAR SEMICONDUCTOR JAPAN GK
Reel/Frame 071913/0125 →
Priority Claims (1)
TW 107134933 · Oct 3, 2018 · national
Continuity (3)
Continuation 16907287 · Jun 21, 2020
Division 16177368 · Oct 31, 2018
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