Granted Patent B2

US 12,685,159 · App. 17/725,422 · Granted Jul 14, 2026

Inventors: Bharath Ramakrishnan (Bellevue, WA); Husam Atallah Alissa (Redmond, WA); Eric C. Peterson (Woodinville, WA); Christian L Belady (Mercer Island, WA); Dennis Trieu (Calgary, CA)

Assignee: Microsoft Technology Licensing, LLC

H10W40/40H10W40/43H10W40/47

Abstract

Claims (37)

1 . A processor comprising:

a first die;

a second die connected to the first die with a microfluidic volume positioned between the first die and the second die and contacting the first die and the second die;

a plurality of pin fins positioned in fixed positions in the microfluidic volume connecting the first die to the second die, wherein a pin fin aspect ratio of pin fin height to pin fin maximum transverse dimension increases among the plurality of pin fins in a flow direction of the microfluidic volume; and

a boiling enhancement surface feature positioned on a pin surface of each pin fin of the plurality of pin fins.

2 . The processor of claim 1 , wherein the boiling enhancement surface feature includes at least one protrusion on the pin surface.

3 . The processor of claim 1 , wherein the boiling enhancement surface feature includes at least one recess positioned in the pin surface of the at least one pin fin.

4 . The processor of claim 3 , wherein the at least one recess has a recess surface, and the recess surface has at least one protrusion on the recess surface.

5 . The processor of claim 1 , wherein the boiling enhancement surface feature is a boiling enhancement coating positioned on the pin surface of the at least one pin fin.

6 . The processor of claim 1 , further comprising a plurality of pin fins, and the at least one pin fin is a first pin fin of the plurality of pin fins, wherein the first pin fin has a first boiling enhancement surface feature positioned on the pin surface of the first pin fin and a second pin fin has a second boiling enhancement surface feature positioned on the pin surface of the second pin fin, wherein the first boiling enhancement surface feature is different from the second boiling enhancement surface feature.

7 . The processor of claim 1 , further comprising a plurality of pin fins, and the at least one pin fin is a first pin fin of the plurality of pin fins, wherein the first pin fin has a first boiling enhancement surface feature positioned on the pin surface of the first pin fin and a second pin fin does not have a boiling enhancement surface feature positioned on the pin surface of the second pin fin.

8 . A processor comprising:

a first die;

a second die connected to the first die with a microfluidic volume positioned between the first die and the second die, wherein the microfluidic volume contacts the first die and the second die to transfer heat from the first die and from the second die to the microfluidic volume;

a plurality of pin fins positioned in the microfluidic volume, wherein a pin fin aspect ratio of pin fin height to pin fin maximum transverse dimension increases among the plurality of pin fins in a flow direction of the microfluidic volume;

at least one through-silicon via (TSV) in at least one pin fin of the plurality of pin fins providing electrical connection between the first die and the second die; and

a boiling enhancement coating positioned on a pin surface of each pin fin of the plurality of pin fins.

9 . The processor of claim 8 , wherein the second die defines a top surface of the microfluidic volume and the first die defines a bottom surface of the microfluidic volume, the top surface and the bottom surface being planar and parallel, and wherein the plurality of pin fins are thermally connected to the first die at the bottom surface and to the second die at the top surface, to transfer heat form the first die and from the second die to the microfluidic volume positioned between the first die and the second die.

10 . The processor of claim 8 , wherein each pin fin of the plurality of pin fins has a maximum transverse dimension of no more than 100 micrometers.

11 . The processor of claim 10 , wherein at least one pin fin of the plurality of pin fins includes a plurality of TSVs therethrough.

12 . The processor of claim 8 , wherein the pin fin aspect ratio of pin fin height to pin fin maximum transverse dimension is no less than 1.0.

13 . The processor of claim 8 , wherein a volume ratio of pin fin to microfluidic volume is no more than 0.9.

14 . The processor of claim 8 , wherein the first die has a first area, and the second die has a second area different from the first area.

15 . The processor of claim 8 , wherein the plurality of pin fins includes a first pin fin and a second pin fin, wherein the first pin fin and second pin fin are different shapes.

16 . A system for cooling a heat-generating component, the system comprising

a first die;

a second die connected to the first die with a microfluidic volume positioned between the first die and the second die, wherein the microfluidic volume contacts the first die and the second die to transfer heat from the first die and from the second die to the microfluidic volume; and

a plurality of pin fins positioned in the microfluidic volume, wherein a pin fin aspect ratio of pin fin height to pin fin maximum transverse dimension increases among the plurality of pin fins in a flow direction of the microfluidic volume;

at least one through-silicon via (TSV) in at least one pin fin of the plurality of pin fins providing electrical connection between the first die and the second die;

a boiling enhancement surface feature positioned on a pin surface of each pin fin of the plurality of pin fins; and

a fluid pump configured to deliver a working fluid to the microfluidic volume.

17 . The system of claim 16 , further comprising a manifold positioned around the microfluidic volume and at least partially defining a side wall of the microfluidic volume.

18 . The system of claim 16 , wherein the fluid pump provides the working fluid to the microfluidic volume with a flow rate of less than 1.0 liters per minute.

19 . The system of claim 16 , further comprising:

a third die connected to the second die with a second microfluidic volume positioned between the second die and the third die;

a second plurality of pin fins positioned between in the second microfluidic volume; and

at least one TSV in at least one pin fin of the second plurality of pin fins providing electrical communication between the second die and the third die.

Assignments (1)

Continuity (1)

References Cited (80)