IP Library › Granted Patent US 12,520,630
Granted Patent B2
US 12,520,630 · App. 17/739,600 · Granted Jan 6, 2026

Display device and method of manufacturing the same

Inventors: Jee Hoon Kim (Yongin-si, KR); Shin Hyuk Yang (Yongin-si, KR); Jae Seol Cho (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
H10H20/8312H01L25/0753H10H20/01H10H20/857H10H20/032H10H20/0364
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Quick Facts
Patent No.
US 12,520,630
App. No.
17/739,600
Granted
Jan 6, 2026
Kind
B2
Abstract

A display device includes a substrate, a first and second bank patterns disposed on a substrate, a gate insulating layer overlapping the first bank pattern, a first transistor including a first and second electrodes disposed on the substrate with the first bank pattern interposed therebetween in a thickness direction, a first semiconductor pattern connected to the first electrode and the second electrode and disposed on a side surface of the first bank pattern, and a first gate electrode disposed to correspond to the first semiconductor pattern with the first semiconductor pattern and the gate insulating layer interposed therebetween, a light emitting element connected to the first transistor and having a first end part and a second end part, a first pixel electrode that contacts the first end part of the light emitting element, and a second pixel electrode that contacts the second end part of the light emitting element.

Claims (41)

1 . A display device comprising:

a substrate;

a first bank pattern and a second bank pattern disposed on the substrate and spaced apart from each other;

a gate-insulating layer overlapping the first bank pattern;

a first transistor including:

a first electrode and a second electrode disposed on the substrate with the first bank pattern interposed therebetween in a thickness direction of the substrate, the second electrode being disposed on a top surface of the first bank pattern;

a first semiconductor pattern electrically connected to the first electrode and the second electrode and disposed on a side surface of the first bank pattern; and

a first gate electrode disposed to correspond to the first semiconductor pattern with the gate-insulating layer interposed therebetween;

a light-emitting element electrically connected to the first transistor and having a first end part and a second end part;

a first pixel electrode that directly electrically contacts the first end part of the light-emitting element; and

a second pixel electrode that directly electrically contacts the second end part of the light-emitting element,

wherein the first pixel electrode is an anode of the light-emitting element and is connected to a first driving power,

wherein the second pixel electrode is a cathode of the light-emitting element and is connected to a second driving power, and

wherein the first driving power and the second driving power have different respective potentials.

2 . The display device according to claim 1 , wherein the first bank pattern and the second bank pattern include an inorganic material.

3 . The display device according to claim 1 , further comprising a second transistor electrically connected to the first transistor, the second transistor comprising:

another first electrode and another second electrode disposed on the substrate with the second bank pattern interposed therebetween in the thickness direction of the substrate;

a second semiconductor pattern electrically connected to the other first electrode and the other second electrode and disposed on a side surface of the second bank pattern; and

a second gate electrode disposed to correspond to the second semiconductor pattern with the gate-insulating layer interposed therebetween.

4 . The display device according to claim 1 , wherein the light-emitting element has a rod-shape, and comprises an active layer disposed between a first semiconductor layer and a second semiconductor layer,

wherein the first semiconductor layer corresponds to the first end part, and

wherein the second semiconductor layer corresponds to the second end part.

5 . The display device according to claim 4 , wherein the light-emitting element is disposed between another side surface of the first bank pattern and another side surface of the second bank pattern.

6 . The display device according to claim 5 , further comprising a storage capacitor comprising:

a first storage electrode disposed along the another side surface of the first bank pattern and an upper surface of the substrate; and

a second storage electrode overlapping the first storage electrode,

wherein the first bank pattern is disposed between the substrate and the first storage electrode in the thickness direction of the substrate.

7 . The display device according to claim 6 , wherein the gate-insulating layer is disposed between the first storage electrode and the second storage electrode, and

wherein the first bank pattern is disposed between the gate-insulating layer and the substrate in the thickness direction of the substrate.

8 . The display device according to claim 6 , wherein the first storage electrode is electrically connected to the first gate electrode.

9 . The display device according to claim 6 , wherein the second storage electrode is a first alignment electrode for aligning the light-emitting element.

10 . The display device according to claim 9 , further comprising:

a driving voltage line disposed along the another side surface of the second bank pattern and the upper surface of the substrate; and

a second alignment electrode disposed on the driving voltage line,

wherein the display device is configured to align the light-emitting element between the first alignment electrode and the second alignment electrode by applying different respective voltages to the first alignment electrode and the second alignment electrode after being deposited by an ink jet technique.

11 . The display device according to claim 10 , further comprising a first insulating layer overlapping the first alignment electrode and the second alignment electrode.

12 . The display device according to claim 11 , wherein the second electrode of the first transistor is electrically connected to the first alignment electrode through a first contact hole of the gate-insulating layer, and

wherein the first alignment electrode is electrically connected to the first pixel electrode through a second contact hole of the first insulating layer.

13 . The display device according to claim 11 , wherein the driving voltage line is electrically connected to the second alignment electrode through a third contact hole of the gate-insulating layer, and

wherein the second alignment electrode is electrically connected to the second pixel electrode through a fourth contact hole of the first insulating layer.

14 . The display device according to claim 1 , wherein the light-emitting element has a size of a nanoscale to a microscale.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2022
From: KIM, JEE HOON; YANG, SHIN HYUK; CHO, JAE SEOL
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 059871/0035 →
Priority Claims (1)
KR 10-2021-0060150 · May 10, 2021 · national
Continuity (1)
Related Publication 20220359791A1 · Nov 10, 2022
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